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4af4016c53
This patch allows the UART clocks to be disabled when the OMAP UARTs are inactive, thus permitting the chip to hit retention in idle. After the expiration of an activity timer, each UART is allowed to disable its clocks so the system can enter retention. The activity timer is (re)activated on any UART interrupt, UART wake event or any IO pad wakeup. The actual disable of the UART clocks is done in the 'prepare_idle' hook called from the OMAP idle loop. While the activity timer is active, the smart-idle mode of the UART is also disabled. This is due to a "feature" of the UART module that after a UART wakeup, the smart-idle mode may be entered before the UART has communicated the interrupt, or upon TX, an idle mode may be entered before the TX FIFOs are emptied. Upon suspend, the 'prepare_suspend' hook cancels any pending activity timers and allows the clocks to be disabled immediately. In addition, upon disabling clocks the UART state is saved in case of an off-mode transition while clocks are off. Special thanks to Tero Kristo for the initial ideas and first versions of UART idle support, and to Jouni Hogander for extra testing and bugfixes. Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810) Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*
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* arch/arm/plat-omap/include/mach/common.h
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*
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* Header for code common to all OMAP machines.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H
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#define __ARCH_ARM_MACH_OMAP_COMMON_H
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#include <linux/i2c.h>
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struct sys_timer;
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extern void omap_map_common_io(void);
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extern struct sys_timer omap_timer;
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#if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)
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extern int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len);
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#else
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static inline int omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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return 0;
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}
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#endif
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/* IO bases for various OMAP processors */
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struct omap_globals {
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u32 class; /* OMAP class to detect */
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void __iomem *tap; /* Control module ID code */
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void __iomem *sdrc; /* SDRAM Controller */
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void __iomem *sms; /* SDRAM Memory Scheduler */
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void __iomem *ctrl; /* System Control Module */
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void __iomem *prm; /* Power and Reset Management */
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void __iomem *cm; /* Clock Management */
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};
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void omap2_set_globals_242x(void);
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void omap2_set_globals_243x(void);
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void omap2_set_globals_343x(void);
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/* These get called from omap2_set_globals_xxxx(), do not call these */
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void omap2_set_globals_tap(struct omap_globals *);
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void omap2_set_globals_sdrc(struct omap_globals *);
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void omap2_set_globals_control(struct omap_globals *);
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void omap2_set_globals_prcm(struct omap_globals *);
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#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */
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