mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
5cf0b2bd45
codec driver and component driver has duplicated callback functions, and codec side functions are just copied to component side when register timing. This was quick-hack, but no longer needed. This patch moves these functions from codec driver to component driver. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
754 lines
19 KiB
C
754 lines
19 KiB
C
/*
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* wm8737.c -- WM8737 ALSA SoC Audio driver
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*
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* Copyright 2010 Wolfson Microelectronics plc
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <linux/of_device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include "wm8737.h"
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#define WM8737_NUM_SUPPLIES 4
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static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
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"DCVDD",
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"DBVDD",
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"AVDD",
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"MVDD",
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};
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/* codec private data */
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struct wm8737_priv {
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struct regmap *regmap;
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struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
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unsigned int mclk;
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};
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static const struct reg_default wm8737_reg_defaults[] = {
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{ 0, 0x00C3 }, /* R0 - Left PGA volume */
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{ 1, 0x00C3 }, /* R1 - Right PGA volume */
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{ 2, 0x0007 }, /* R2 - AUDIO path L */
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{ 3, 0x0007 }, /* R3 - AUDIO path R */
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{ 4, 0x0000 }, /* R4 - 3D Enhance */
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{ 5, 0x0000 }, /* R5 - ADC Control */
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{ 6, 0x0000 }, /* R6 - Power Management */
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{ 7, 0x000A }, /* R7 - Audio Format */
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{ 8, 0x0000 }, /* R8 - Clocking */
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{ 9, 0x000F }, /* R9 - MIC Preamp Control */
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{ 10, 0x0003 }, /* R10 - Misc Bias Control */
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{ 11, 0x0000 }, /* R11 - Noise Gate */
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{ 12, 0x007C }, /* R12 - ALC1 */
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{ 13, 0x0000 }, /* R13 - ALC2 */
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{ 14, 0x0032 }, /* R14 - ALC3 */
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};
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static bool wm8737_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case WM8737_RESET:
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return true;
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default:
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return false;
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}
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}
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static int wm8737_reset(struct snd_soc_codec *codec)
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{
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return snd_soc_write(codec, WM8737_RESET, 0);
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}
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static const DECLARE_TLV_DB_RANGE(micboost_tlv,
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0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
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1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
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2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
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3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0)
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);
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static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
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static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
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static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
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static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
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static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
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static const char *micbias_enum_text[] = {
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"25%",
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"50%",
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"75%",
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"100%",
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};
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static SOC_ENUM_SINGLE_DECL(micbias_enum,
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WM8737_MIC_PREAMP_CONTROL, 0, micbias_enum_text);
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static const char *low_cutoff_text[] = {
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"Low", "High"
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};
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static SOC_ENUM_SINGLE_DECL(low_3d,
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WM8737_3D_ENHANCE, 6, low_cutoff_text);
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static const char *high_cutoff_text[] = {
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"High", "Low"
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};
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static SOC_ENUM_SINGLE_DECL(high_3d,
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WM8737_3D_ENHANCE, 5, high_cutoff_text);
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static const char *alc_fn_text[] = {
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"Disabled", "Right", "Left", "Stereo"
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};
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static SOC_ENUM_SINGLE_DECL(alc_fn,
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WM8737_ALC1, 7, alc_fn_text);
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static const char *alc_hold_text[] = {
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"0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
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"170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
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"10.916s", "21.832s", "43.691s"
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};
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static SOC_ENUM_SINGLE_DECL(alc_hold,
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WM8737_ALC2, 0, alc_hold_text);
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static const char *alc_atk_text[] = {
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"8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
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"1.075s", "2.15s", "4.3s", "8.6s"
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};
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static SOC_ENUM_SINGLE_DECL(alc_atk,
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WM8737_ALC3, 0, alc_atk_text);
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static const char *alc_dcy_text[] = {
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"33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
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"4.3s", "8.6s", "17.2s", "34.41s"
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};
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static SOC_ENUM_SINGLE_DECL(alc_dcy,
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WM8737_ALC3, 4, alc_dcy_text);
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static const struct snd_kcontrol_new wm8737_snd_controls[] = {
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SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
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6, 3, 0, micboost_tlv),
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SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
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4, 1, 0),
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SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
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3, 1, 0),
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SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
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WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
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SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
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2, 1, 0),
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SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
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SOC_ENUM("Mic PGA Bias", micbias_enum),
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SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
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SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
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SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
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SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
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SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
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SOC_ENUM("3D Low Cut-off", low_3d),
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SOC_ENUM("3D High Cut-off", low_3d),
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SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
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SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
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SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
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ng_tlv),
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SOC_ENUM("ALC", alc_fn),
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SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
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SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
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SOC_ENUM("ALC Hold Time", alc_hold),
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SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
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SOC_ENUM("ALC Attack Time", alc_atk),
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SOC_ENUM("ALC Decay Time", alc_dcy),
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};
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static const char *linsel_text[] = {
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"LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
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};
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static SOC_ENUM_SINGLE_DECL(linsel_enum,
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WM8737_AUDIO_PATH_L, 7, linsel_text);
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static const struct snd_kcontrol_new linsel_mux =
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SOC_DAPM_ENUM("LINSEL", linsel_enum);
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static const char *rinsel_text[] = {
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"RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
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};
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static SOC_ENUM_SINGLE_DECL(rinsel_enum,
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WM8737_AUDIO_PATH_R, 7, rinsel_text);
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static const struct snd_kcontrol_new rinsel_mux =
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SOC_DAPM_ENUM("RINSEL", rinsel_enum);
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static const char *bypass_text[] = {
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"Direct", "Preamp"
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};
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static SOC_ENUM_SINGLE_DECL(lbypass_enum,
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WM8737_MIC_PREAMP_CONTROL, 2, bypass_text);
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static const struct snd_kcontrol_new lbypass_mux =
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SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
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static SOC_ENUM_SINGLE_DECL(rbypass_enum,
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WM8737_MIC_PREAMP_CONTROL, 3, bypass_text);
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static const struct snd_kcontrol_new rbypass_mux =
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SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
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static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("LINPUT1"),
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SND_SOC_DAPM_INPUT("LINPUT2"),
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SND_SOC_DAPM_INPUT("LINPUT3"),
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SND_SOC_DAPM_INPUT("RINPUT1"),
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SND_SOC_DAPM_INPUT("RINPUT2"),
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SND_SOC_DAPM_INPUT("RINPUT3"),
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SND_SOC_DAPM_INPUT("LACIN"),
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SND_SOC_DAPM_INPUT("RACIN"),
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SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
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SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
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SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
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SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
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SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
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SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
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SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
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SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
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SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
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};
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static const struct snd_soc_dapm_route intercon[] = {
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{ "LINSEL", "LINPUT1", "LINPUT1" },
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{ "LINSEL", "LINPUT2", "LINPUT2" },
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{ "LINSEL", "LINPUT3", "LINPUT3" },
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{ "LINSEL", "LINPUT1 DC", "LINPUT1" },
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{ "RINSEL", "RINPUT1", "RINPUT1" },
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{ "RINSEL", "RINPUT2", "RINPUT2" },
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{ "RINSEL", "RINPUT3", "RINPUT3" },
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{ "RINSEL", "RINPUT1 DC", "RINPUT1" },
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{ "Left Preamp Mux", "Preamp", "LINSEL" },
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{ "Left Preamp Mux", "Direct", "LACIN" },
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{ "Right Preamp Mux", "Preamp", "RINSEL" },
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{ "Right Preamp Mux", "Direct", "RACIN" },
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{ "PGAL", NULL, "Left Preamp Mux" },
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{ "PGAR", NULL, "Right Preamp Mux" },
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{ "ADCL", NULL, "PGAL" },
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{ "ADCR", NULL, "PGAR" },
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{ "AIF", NULL, "ADCL" },
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{ "AIF", NULL, "ADCR" },
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};
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/* codec mclk clock divider coefficients */
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static const struct {
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u32 mclk;
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u32 rate;
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u8 usb;
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u8 sr;
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} coeff_div[] = {
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{ 12288000, 8000, 0, 0x4 },
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{ 12288000, 12000, 0, 0x8 },
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{ 12288000, 16000, 0, 0xa },
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{ 12288000, 24000, 0, 0x1c },
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{ 12288000, 32000, 0, 0xc },
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{ 12288000, 48000, 0, 0 },
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{ 12288000, 96000, 0, 0xe },
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{ 11289600, 8000, 0, 0x14 },
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{ 11289600, 11025, 0, 0x18 },
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{ 11289600, 22050, 0, 0x1a },
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{ 11289600, 44100, 0, 0x10 },
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{ 11289600, 88200, 0, 0x1e },
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{ 18432000, 8000, 0, 0x5 },
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{ 18432000, 12000, 0, 0x9 },
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{ 18432000, 16000, 0, 0xb },
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{ 18432000, 24000, 0, 0x1b },
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{ 18432000, 32000, 0, 0xd },
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{ 18432000, 48000, 0, 0x1 },
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{ 18432000, 96000, 0, 0x1f },
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{ 16934400, 8000, 0, 0x15 },
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{ 16934400, 11025, 0, 0x19 },
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{ 16934400, 22050, 0, 0x1b },
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{ 16934400, 44100, 0, 0x11 },
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{ 16934400, 88200, 0, 0x1f },
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{ 12000000, 8000, 1, 0x4 },
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{ 12000000, 11025, 1, 0x19 },
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{ 12000000, 12000, 1, 0x8 },
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{ 12000000, 16000, 1, 0xa },
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{ 12000000, 22050, 1, 0x1b },
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{ 12000000, 24000, 1, 0x1c },
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{ 12000000, 32000, 1, 0xc },
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{ 12000000, 44100, 1, 0x11 },
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{ 12000000, 48000, 1, 0x0 },
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{ 12000000, 88200, 1, 0x1f },
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{ 12000000, 96000, 1, 0xe },
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};
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static int wm8737_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
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int i;
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u16 clocking = 0;
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u16 af = 0;
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for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
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if (coeff_div[i].rate != params_rate(params))
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continue;
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if (coeff_div[i].mclk == wm8737->mclk)
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break;
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if (coeff_div[i].mclk == wm8737->mclk * 2) {
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clocking |= WM8737_CLKDIV2;
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break;
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}
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}
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if (i == ARRAY_SIZE(coeff_div)) {
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dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
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wm8737->mclk, params_rate(params));
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return -EINVAL;
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}
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clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
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switch (params_width(params)) {
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case 16:
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break;
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case 20:
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af |= 0x8;
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break;
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case 24:
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af |= 0x10;
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break;
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case 32:
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af |= 0x18;
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break;
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default:
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return -EINVAL;
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}
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snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
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snd_soc_update_bits(codec, WM8737_CLOCKING,
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WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
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clocking);
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return 0;
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}
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static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
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int i;
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for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
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if (freq == coeff_div[i].mclk ||
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freq == coeff_div[i].mclk * 2) {
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wm8737->mclk = freq;
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return 0;
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}
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}
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dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
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return -EINVAL;
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}
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static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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u16 af = 0;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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af |= WM8737_MS;
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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break;
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default:
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return -EINVAL;
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}
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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af |= 0x2;
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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af |= 0x1;
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break;
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case SND_SOC_DAIFMT_DSP_A:
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af |= 0x3;
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break;
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case SND_SOC_DAIFMT_DSP_B:
|
|
af |= 0x13;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
|
|
case SND_SOC_DAIFMT_NB_NF:
|
|
break;
|
|
case SND_SOC_DAIFMT_NB_IF:
|
|
af |= WM8737_LRP;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
|
|
WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int wm8737_set_bias_level(struct snd_soc_codec *codec,
|
|
enum snd_soc_bias_level level)
|
|
{
|
|
struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
|
|
int ret;
|
|
|
|
switch (level) {
|
|
case SND_SOC_BIAS_ON:
|
|
break;
|
|
|
|
case SND_SOC_BIAS_PREPARE:
|
|
/* VMID at 2*75k */
|
|
snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
|
|
WM8737_VMIDSEL_MASK, 0);
|
|
break;
|
|
|
|
case SND_SOC_BIAS_STANDBY:
|
|
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
|
|
wm8737->supplies);
|
|
if (ret != 0) {
|
|
dev_err(codec->dev,
|
|
"Failed to enable supplies: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
regcache_sync(wm8737->regmap);
|
|
|
|
/* Fast VMID ramp at 2*2.5k */
|
|
snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
|
|
WM8737_VMIDSEL_MASK,
|
|
2 << WM8737_VMIDSEL_SHIFT);
|
|
|
|
/* Bring VMID up */
|
|
snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
|
|
WM8737_VMID_MASK |
|
|
WM8737_VREF_MASK,
|
|
WM8737_VMID_MASK |
|
|
WM8737_VREF_MASK);
|
|
|
|
msleep(500);
|
|
}
|
|
|
|
/* VMID at 2*300k */
|
|
snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
|
|
WM8737_VMIDSEL_MASK,
|
|
1 << WM8737_VMIDSEL_SHIFT);
|
|
|
|
break;
|
|
|
|
case SND_SOC_BIAS_OFF:
|
|
snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
|
|
WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
|
|
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
|
|
wm8737->supplies);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define WM8737_RATES SNDRV_PCM_RATE_8000_96000
|
|
|
|
#define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
|
|
SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
|
|
|
|
static const struct snd_soc_dai_ops wm8737_dai_ops = {
|
|
.hw_params = wm8737_hw_params,
|
|
.set_sysclk = wm8737_set_dai_sysclk,
|
|
.set_fmt = wm8737_set_dai_fmt,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver wm8737_dai = {
|
|
.name = "wm8737",
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 2, /* Mono modes not yet supported */
|
|
.channels_max = 2,
|
|
.rates = WM8737_RATES,
|
|
.formats = WM8737_FORMATS,
|
|
},
|
|
.ops = &wm8737_dai_ops,
|
|
};
|
|
|
|
static int wm8737_probe(struct snd_soc_codec *codec)
|
|
{
|
|
struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
|
|
int ret;
|
|
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
|
|
wm8737->supplies);
|
|
if (ret != 0) {
|
|
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
|
|
goto err_get;
|
|
}
|
|
|
|
ret = wm8737_reset(codec);
|
|
if (ret < 0) {
|
|
dev_err(codec->dev, "Failed to issue reset\n");
|
|
goto err_enable;
|
|
}
|
|
|
|
snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
|
|
WM8737_LVU);
|
|
snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
|
|
WM8737_RVU);
|
|
|
|
snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
|
|
|
/* Bias level configuration will have done an extra enable */
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
|
|
|
|
return 0;
|
|
|
|
err_enable:
|
|
regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
|
|
err_get:
|
|
return ret;
|
|
}
|
|
|
|
static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
|
|
.probe = wm8737_probe,
|
|
.set_bias_level = wm8737_set_bias_level,
|
|
.suspend_bias_off = true,
|
|
|
|
.component_driver = {
|
|
.controls = wm8737_snd_controls,
|
|
.num_controls = ARRAY_SIZE(wm8737_snd_controls),
|
|
.dapm_widgets = wm8737_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(wm8737_dapm_widgets),
|
|
.dapm_routes = intercon,
|
|
.num_dapm_routes = ARRAY_SIZE(intercon),
|
|
},
|
|
};
|
|
|
|
static const struct of_device_id wm8737_of_match[] = {
|
|
{ .compatible = "wlf,wm8737", },
|
|
{ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, wm8737_of_match);
|
|
|
|
static const struct regmap_config wm8737_regmap = {
|
|
.reg_bits = 7,
|
|
.val_bits = 9,
|
|
.max_register = WM8737_MAX_REGISTER,
|
|
|
|
.reg_defaults = wm8737_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
|
|
.cache_type = REGCACHE_RBTREE,
|
|
|
|
.volatile_reg = wm8737_volatile,
|
|
};
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
static int wm8737_i2c_probe(struct i2c_client *i2c,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct wm8737_priv *wm8737;
|
|
int ret, i;
|
|
|
|
wm8737 = devm_kzalloc(&i2c->dev, sizeof(struct wm8737_priv),
|
|
GFP_KERNEL);
|
|
if (wm8737 == NULL)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
|
|
wm8737->supplies[i].supply = wm8737_supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8737->supplies),
|
|
wm8737->supplies);
|
|
if (ret != 0) {
|
|
dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
|
|
if (IS_ERR(wm8737->regmap))
|
|
return PTR_ERR(wm8737->regmap);
|
|
|
|
i2c_set_clientdata(i2c, wm8737);
|
|
|
|
ret = snd_soc_register_codec(&i2c->dev,
|
|
&soc_codec_dev_wm8737, &wm8737_dai, 1);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
static int wm8737_i2c_remove(struct i2c_client *client)
|
|
{
|
|
snd_soc_unregister_codec(&client->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id wm8737_i2c_id[] = {
|
|
{ "wm8737", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
|
|
|
|
static struct i2c_driver wm8737_i2c_driver = {
|
|
.driver = {
|
|
.name = "wm8737",
|
|
.of_match_table = wm8737_of_match,
|
|
},
|
|
.probe = wm8737_i2c_probe,
|
|
.remove = wm8737_i2c_remove,
|
|
.id_table = wm8737_i2c_id,
|
|
};
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_MASTER)
|
|
static int wm8737_spi_probe(struct spi_device *spi)
|
|
{
|
|
struct wm8737_priv *wm8737;
|
|
int ret, i;
|
|
|
|
wm8737 = devm_kzalloc(&spi->dev, sizeof(struct wm8737_priv),
|
|
GFP_KERNEL);
|
|
if (wm8737 == NULL)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
|
|
wm8737->supplies[i].supply = wm8737_supply_names[i];
|
|
|
|
ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8737->supplies),
|
|
wm8737->supplies);
|
|
if (ret != 0) {
|
|
dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
|
|
if (IS_ERR(wm8737->regmap))
|
|
return PTR_ERR(wm8737->regmap);
|
|
|
|
spi_set_drvdata(spi, wm8737);
|
|
|
|
ret = snd_soc_register_codec(&spi->dev,
|
|
&soc_codec_dev_wm8737, &wm8737_dai, 1);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int wm8737_spi_remove(struct spi_device *spi)
|
|
{
|
|
snd_soc_unregister_codec(&spi->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct spi_driver wm8737_spi_driver = {
|
|
.driver = {
|
|
.name = "wm8737",
|
|
.of_match_table = wm8737_of_match,
|
|
},
|
|
.probe = wm8737_spi_probe,
|
|
.remove = wm8737_spi_remove,
|
|
};
|
|
#endif /* CONFIG_SPI_MASTER */
|
|
|
|
static int __init wm8737_modinit(void)
|
|
{
|
|
int ret;
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
ret = i2c_add_driver(&wm8737_i2c_driver);
|
|
if (ret != 0) {
|
|
printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
|
|
ret);
|
|
}
|
|
#endif
|
|
#if defined(CONFIG_SPI_MASTER)
|
|
ret = spi_register_driver(&wm8737_spi_driver);
|
|
if (ret != 0) {
|
|
printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
|
|
ret);
|
|
}
|
|
#endif
|
|
return 0;
|
|
}
|
|
module_init(wm8737_modinit);
|
|
|
|
static void __exit wm8737_exit(void)
|
|
{
|
|
#if defined(CONFIG_SPI_MASTER)
|
|
spi_unregister_driver(&wm8737_spi_driver);
|
|
#endif
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
i2c_del_driver(&wm8737_i2c_driver);
|
|
#endif
|
|
}
|
|
module_exit(wm8737_exit);
|
|
|
|
MODULE_DESCRIPTION("ASoC WM8737 driver");
|
|
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
|
|
MODULE_LICENSE("GPL");
|