mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-04-07 16:38:02 +07:00
5214cae77c
Here is the quote from [1]:
The unit-address must match the first address specified
in the reg property of the node. If the node has no reg property,
the @ and unit-address must be omitted and the node-name alone
differentiates the node from other nodes at the same level
This patch adjusts MIPS dts-files and devicetree binding
documentation in accordance with [1].
[1] Power.org(tm) Standard for Embedded Power Architecture(tm)
Platform Requirements (ePAPR). Version 1.1 – 08 April 2011.
Chapter 2.2.1.1 Node Name Requirements
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13345/
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
47 lines
830 B
Plaintext
47 lines
830 B
Plaintext
/dts-v1/;
|
|
|
|
#include "microAptiv.dtsi"
|
|
|
|
/ {
|
|
compatible = "digilent,nexys4ddr";
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x0 0x08000000>;
|
|
};
|
|
|
|
cpuintc: interrupt-controller {
|
|
#address-cells = <0>;
|
|
#interrupt-cells = <1>;
|
|
interrupt-controller;
|
|
compatible = "mti,cpu-interrupt-controller";
|
|
};
|
|
|
|
axi_gpio: gpio@10600000 {
|
|
#gpio-cells = <1>;
|
|
compatible = "xlnx,xps-gpio-1.00.a";
|
|
gpio-controller;
|
|
reg = <0x10600000 0x10000>;
|
|
xlnx,all-inputs = <0x0>;
|
|
xlnx,dout-default = <0x0>;
|
|
xlnx,gpio-width = <0x16>;
|
|
xlnx,interrupt-present = <0x0>;
|
|
xlnx,is-dual = <0x0>;
|
|
xlnx,tri-default = <0xffffffff>;
|
|
} ;
|
|
|
|
axi_uart16550: serial@10400000 {
|
|
compatible = "ns16550a";
|
|
reg = <0x10400000 0x10000>;
|
|
|
|
reg-shift = <2>;
|
|
reg-offset = <0x1000>;
|
|
|
|
clocks = <&ext>;
|
|
};
|
|
};
|
|
|
|
&ext {
|
|
clock-frequency = <50000000>;
|
|
};
|