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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
4ac45eb8d1
Some parts of Host1x uses BIT_WORD/BIT_MASK/BITS_PER_LONG to calculate register or field offsets. This worked fine on ARMv7, but now that BITS_PER_LONG is 64 but our registers are still 32-bit things are broken. Fix by replacing.. - BIT_WORD with (x / 32) - BIT_MASK with BIT(x % 32) - BITS_PER_LONG with 32 Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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| .. | ||
| cdma_hw.c | ||
| channel_hw.c | ||
| debug_hw.c | ||
| host1x01_hardware.h | ||
| host1x01.c | ||
| host1x01.h | ||
| host1x02_hardware.h | ||
| host1x02.c | ||
| host1x02.h | ||
| host1x04_hardware.h | ||
| host1x04.c | ||
| host1x04.h | ||
| host1x05_hardware.h | ||
| host1x05.c | ||
| host1x05.h | ||
| hw_host1x01_channel.h | ||
| hw_host1x01_sync.h | ||
| hw_host1x01_uclass.h | ||
| hw_host1x02_channel.h | ||
| hw_host1x02_sync.h | ||
| hw_host1x02_uclass.h | ||
| hw_host1x04_channel.h | ||
| hw_host1x04_sync.h | ||
| hw_host1x04_uclass.h | ||
| hw_host1x05_channel.h | ||
| hw_host1x05_sync.h | ||
| hw_host1x05_uclass.h | ||
| intr_hw.c | ||
| syncpt_hw.c | ||