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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-07 12:06:40 +07:00
f706bed114
The Freescale serial port's are pretty much a 16550, however there are some FSL specific bugs and features. Add a "fsl,ns16550" compatiable string to allow code to handle those FSL specific issues. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
148 lines
3.7 KiB
Plaintext
148 lines
3.7 KiB
Plaintext
/*
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* Device Tree Souce for Buffalo KuroboxHG
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*
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* Choose CONFIG_LINKSTATION to build a kernel for KuroboxHG, or use
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* the default configuration linkstation_defconfig.
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*
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* Based on sandpoint.dts
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*
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* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
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* Copyright 2008 Freescale Semiconductor, Inc.
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*
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* This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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XXXX add flash parts, rtc, ??
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*/
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/dts-v1/;
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/ {
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model = "KuroboxHG";
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compatible = "linkstation";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &serial0;
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serial1 = &serial1;
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pci0 = &pci0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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PowerPC,603e { /* Really 8241 */
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device_type = "cpu";
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reg = <0x0>;
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clock-frequency = <266000000>; /* Fixed by bootloader */
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timebase-frequency = <32522240>; /* Fixed by bootloader */
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bus-frequency = <0>; /* Fixed by bootloader */
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/* Following required by dtc but not used */
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i-cache-size = <0x4000>;
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d-cache-size = <0x4000>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
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#address-cells = <1>;
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#size-cells = <1>;
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device_type = "soc";
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compatible = "mpc10x";
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store-gathering = <0>; /* 0 == off, !0 == on */
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reg = <0x80000000 0x100000>;
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ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
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0xfc000000 0xfc000000 0x100000 /* EUMB */
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0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
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0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
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0xfef00000 0xfef00000 0x100000>; /* pci iack */
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i2c@80003000 {
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#address-cells = <1>;
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#size-cells = <0>;
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cell-index = <0>;
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compatible = "fsl-i2c";
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reg = <0x80003000 0x1000>;
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interrupts = <5 2>;
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interrupt-parent = <&mpic>;
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rtc@32 {
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compatible = "ricoh,rs5c372a";
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reg = <0x32>;
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};
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};
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serial0: serial@80004500 {
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cell-index = <0>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x80004500 0x8>;
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clock-frequency = <130041000>;
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current-speed = <9600>;
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interrupts = <9 0>;
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interrupt-parent = <&mpic>;
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};
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serial1: serial@80004600 {
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cell-index = <1>;
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device_type = "serial";
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compatible = "fsl,ns16550", "ns16550";
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reg = <0x80004600 0x8>;
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clock-frequency = <130041000>;
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current-speed = <57600>;
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interrupts = <10 0>;
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interrupt-parent = <&mpic>;
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};
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mpic: interrupt-controller@80040000 {
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#interrupt-cells = <2>;
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#address-cells = <0>;
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device_type = "open-pic";
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compatible = "chrp,open-pic";
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interrupt-controller;
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reg = <0x80040000 0x40000>;
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};
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pci0: pci@fec00000 {
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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device_type = "pci";
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compatible = "mpc10x-pci";
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reg = <0xfec00000 0x400000>;
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ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
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0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
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bus-range = <0 255>;
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clock-frequency = <133333333>;
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interrupt-parent = <&mpic>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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/* IDSEL 11 - IRQ0 ETH */
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0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
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0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
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0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
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0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
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/* IDSEL 12 - IRQ1 IDE0 */
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0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
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0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
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0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
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0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
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/* IDSEL 14 - IRQ3 USB2.0 */
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0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
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0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
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0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
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0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
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>;
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};
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};
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};
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