mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8b73fb8e29
Adapted from Realtek-provided driver... Signed-off-by: John W. Linville <linville@tuxdriver.com> Tested-by: Pauli Nieminen <suokkos@gmail.com>
229 lines
5.9 KiB
C
229 lines
5.9 KiB
C
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/*
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* Radio tuning for Philips SA2400 on RTL8180
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*
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Code from the BSD driver and the rtl8181 project have been
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* very useful to understand certain things
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*
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* I want to thanks the Authors of such projects and the Ndiswrapper
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* project Authors.
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*
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* A special Big Thanks also is for all people who donated me cards,
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* making possible the creation of the original rtl8180 driver
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* from which this code is derived!
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <net/mac80211.h>
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#include "rtl8180.h"
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#include "rtl8180_sa2400.h"
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static const u32 sa2400_chan[] = {
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0x00096c, /* ch1 */
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0x080970,
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0x100974,
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0x180978,
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0x000980,
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0x080984,
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0x100988,
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0x18098c,
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0x000994,
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0x080998,
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0x10099c,
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0x1809a0,
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0x0009a8,
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0x0009b4, /* ch 14 */
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};
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static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
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{
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struct rtl8180_priv *priv = dev->priv;
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u32 phy_config;
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/* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
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phy_config = 0xb0000000;
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phy_config |= ((u32)(addr & 0xf)) << 24;
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phy_config |= data & 0xffffff;
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rtl818x_iowrite32(priv,
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(__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
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msleep(3);
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}
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static void sa2400_write_phy_antenna(struct ieee80211_hw *dev, short chan)
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{
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struct rtl8180_priv *priv = dev->priv;
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u8 ant = SA2400_ANTENNA;
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if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
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ant |= BB_ANTENNA_B;
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if (chan == 14)
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ant |= BB_ANTATTEN_CHAN14;
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rtl8180_write_phy(dev, 0x10, ant);
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}
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static u8 sa2400_rf_rssi_map[] = {
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0x64, 0x64, 0x63, 0x62, 0x61, 0x60, 0x5f, 0x5e,
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0x5d, 0x5c, 0x5b, 0x5a, 0x57, 0x54, 0x52, 0x50,
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0x4e, 0x4c, 0x4a, 0x48, 0x46, 0x44, 0x41, 0x3f,
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0x3c, 0x3a, 0x37, 0x36, 0x36, 0x1c, 0x1c, 0x1b,
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0x1b, 0x1a, 0x1a, 0x19, 0x19, 0x18, 0x18, 0x17,
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0x17, 0x16, 0x16, 0x15, 0x15, 0x14, 0x14, 0x13,
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0x13, 0x12, 0x12, 0x11, 0x11, 0x10, 0x10, 0x0f,
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0x0f, 0x0e, 0x0e, 0x0d, 0x0d, 0x0c, 0x0c, 0x0b,
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0x0b, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x07,
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0x07, 0x06, 0x06, 0x05, 0x04, 0x03, 0x02,
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};
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static u8 sa2400_rf_calc_rssi(u8 agc, u8 sq)
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{
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if (sq == 0x80)
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return 1;
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if (sq > 78)
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return 32;
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/* TODO: recalc sa2400_rf_rssi_map to avoid mult / div */
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return 65 * sa2400_rf_rssi_map[sq] / 100;
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}
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static void sa2400_rf_set_channel(struct ieee80211_hw *dev,
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struct ieee80211_conf *conf)
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{
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struct rtl8180_priv *priv = dev->priv;
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int channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
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u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
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u32 chan = sa2400_chan[channel - 1];
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write_sa2400(dev, 7, txpw);
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sa2400_write_phy_antenna(dev, channel);
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write_sa2400(dev, 0, chan);
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write_sa2400(dev, 1, 0xbb50);
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write_sa2400(dev, 2, 0x80);
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write_sa2400(dev, 3, 0);
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}
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static void sa2400_rf_stop(struct ieee80211_hw *dev)
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{
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write_sa2400(dev, 4, 0);
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}
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static void sa2400_rf_init(struct ieee80211_hw *dev)
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{
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struct rtl8180_priv *priv = dev->priv;
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u32 anaparam, txconf;
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u8 firdac;
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int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
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anaparam = priv->anaparam;
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anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
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anaparam &= ~ANAPARAM_PWR1_MASK;
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anaparam &= ~ANAPARAM_PWR0_MASK;
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if (analogphy) {
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anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
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firdac = 0;
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} else {
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anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
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anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
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firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
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}
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rtl8180_set_anaparam(priv, anaparam);
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write_sa2400(dev, 0, sa2400_chan[0]);
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write_sa2400(dev, 1, 0xbb50);
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write_sa2400(dev, 2, 0x80);
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write_sa2400(dev, 3, 0);
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write_sa2400(dev, 4, 0x19340 | firdac);
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write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
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write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
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if (!analogphy)
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write_sa2400(dev, 4, 0x1938c); /*???*/
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write_sa2400(dev, 4, 0x19340 | firdac);
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write_sa2400(dev, 0, sa2400_chan[0]);
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write_sa2400(dev, 1, 0xbb50);
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write_sa2400(dev, 2, 0x80);
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write_sa2400(dev, 3, 0);
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write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
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/* new from rtl8180 embedded driver (rtl8181 project) */
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write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
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write_sa2400(dev, 8, 0); /* VCO */
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if (analogphy) {
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rtl8180_set_anaparam(priv, anaparam |
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(1 << ANAPARAM_TXDACOFF_SHIFT));
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txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
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rtl818x_iowrite32(priv, &priv->map->TX_CONF,
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txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
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write_sa2400(dev, 4, 0x19341); /* calibrates DC */
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/* a 5us sleep is required here,
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* we rely on the 3ms delay introduced in write_sa2400 */
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write_sa2400(dev, 4, 0x19345);
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/* a 20us sleep is required here,
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* we rely on the 3ms delay introduced in write_sa2400 */
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rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
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rtl8180_set_anaparam(priv, anaparam);
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}
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/* end new code */
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write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
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/* baseband configuration */
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rtl8180_write_phy(dev, 0, 0x98);
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rtl8180_write_phy(dev, 3, 0x38);
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rtl8180_write_phy(dev, 4, 0xe0);
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rtl8180_write_phy(dev, 5, 0x90);
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rtl8180_write_phy(dev, 6, 0x1a);
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rtl8180_write_phy(dev, 7, 0x64);
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sa2400_write_phy_antenna(dev, 1);
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rtl8180_write_phy(dev, 0x11, 0x80);
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if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
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RTL818X_CONFIG2_ANTENNA_DIV)
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rtl8180_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
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else
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rtl8180_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
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rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
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rtl8180_write_phy(dev, 0x19, 0x0);
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rtl8180_write_phy(dev, 0x1a, 0xa0);
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}
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const struct rtl818x_rf_ops sa2400_rf_ops = {
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.name = "Philips",
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.init = sa2400_rf_init,
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.stop = sa2400_rf_stop,
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.set_chan = sa2400_rf_set_channel,
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.calc_rssi = sa2400_rf_calc_rssi,
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};
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