mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 07:46:53 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
111 lines
2.8 KiB
C
111 lines
2.8 KiB
C
/*
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* linux/include/asm-arm/arch-arc/hardware.h
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*
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* Copyright (C) 1996-1999 Russell King.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This file contains the hardware definitions of the
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* Acorn Archimedes/A5000 machines.
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*
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* Modifications:
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* 04-04-1998 PJB/RMK Merged arc and a5k versions
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*/
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#ifndef __ASM_HARDWARE_H
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#define __ASM_HARDWARE_H
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#include <linux/config.h>
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/*
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* What hardware must be present - these can be tested by the kernel
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* source.
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*/
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#define HAS_IOC
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#define HAS_MEMC
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#define HAS_VIDC
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#define VDMA_ALIGNMENT PAGE_SIZE
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#define VDMA_XFERSIZE 16
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#define VDMA_INIT 0
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#define VDMA_START 1
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#define VDMA_END 2
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#ifndef __ASSEMBLY__
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extern void memc_write(unsigned int reg, unsigned long val);
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#define video_set_dma(start,end,offset) \
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do { \
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memc_write (VDMA_START, (start >> 2)); \
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memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \
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memc_write (VDMA_INIT, (offset >> 2)); \
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} while (0)
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#endif
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/* Hardware addresses of major areas.
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* *_START is the physical address
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* *_SIZE is the size of the region
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* *_BASE is the virtual address
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*/
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#define IO_START 0x03000000
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#define IO_SIZE 0x01000000
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#define IO_BASE 0x03000000
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/*
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* Screen mapping information
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*/
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#define SCREEN_START 0x02000000
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#define SCREEN_END 0x02078000
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#define SCREEN_SIZE 0x00078000
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#define SCREEN_BASE 0x02000000
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#define EXPMASK_BASE 0x03360000
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#define IOEB_BASE 0x03350000
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#define VIDC_BASE 0x03400000
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#define LATCHA_BASE 0x03250040
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#define LATCHB_BASE 0x03250018
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#define IOC_BASE 0x03200000
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#define FLOPPYDMA_BASE 0x0302a000
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#define PCIO_BASE 0x03010000
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// FIXME - are the below correct?
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#define PODSLOT_IOC0_BASE 0x03240000
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#define PODSLOT_IOC_SIZE (1 << 14)
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#define PODSLOT_MEMC_BASE 0x03000000
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#define PODSLOT_MEMC_SIZE (1 << 14)
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#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
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#ifndef __ASSEMBLY__
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/*
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* for use with inb/outb
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*/
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#define IOEB_VID_CTL (IOEB_BASE + 0x48)
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#define IOEB_PRESENT (IOEB_BASE + 0x50)
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#define IOEB_PSCLR (IOEB_BASE + 0x58)
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#define IOEB_MONTYPE (IOEB_BASE + 0x70)
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//FIXME - These adresses are weird - ISTR some weirdo address shifting stuff was going on here...
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#define IO_EC_IOC_BASE 0x80090000
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#define IO_EC_MEMC_BASE 0x80000000
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#ifdef CONFIG_ARCH_ARC
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/* A680 hardware */
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#define WD1973_BASE 0x03290000
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#define WD1973_LATCH 0x03350000
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#define Z8530_BASE 0x032b0008
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#define SCSI_BASE 0x03100000
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#endif
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#endif
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#define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
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#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
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#endif
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