mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 11:56:46 +07:00
8e50966072
A big set this merge window, as we have much going on in this subsystem. Major changes this time: - Some core improvements and cleanups to the new GPIO descriptor API. This seems to be working now so we can start the exodus to this API, moving gradually away from the global GPIO numberspace. - Incremental improvements to the ACPI GPIO core, and move the few GPIO ACPI clients we have to the GPIO descriptor API right *now* before we go any further. We actually managed to contain this *before* we started to litter the kernel with yet another hackish global numberspace for the ACPI GPIOs, which is a big win. - The RFkill GPIO driver and all platforms using it have been migrated to use the GPIO descriptors rather than fixed number assignments. Tegra machine has been migrated as part of this. - New drivers for MOXA ART, Xtensa GPIO32 and SMSC SCH311x. Those should be really good examples of how I expect a nice GPIO driver to look these days. - Do away with custom GPIO implementations on a major part of the ARM machines: ks8695, lpc32xx, mv78xx0. Make a first step towards the same in the horribly convoluted Samsung S3C include forest. We expect to continue to clean this up as we move forward. - Flag GPIO lines used for IRQ on adnp, bcm-kona, em, intel-mid and lynxpoint. This makes the GPIOlib core aware that a certain GPIO line is used for IRQs and can then enforce some semantics such as disallowing a GPIO line marked as in use for IRQ to be switched to output mode. - Drop all use of irq_set_chip_and_handler_name(). The name provided in these cases were just unhelpful tags like "mux" or "demux". - Extend the MCP23s08 driver to handle interrupts. - Minor incremental improvements for rcar, lynxpoint, em 74x164 and msm drivers. - Some non-urgent bug fixes here and there, duplicate #includes and that usual kind of cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJS3i/MAAoJEEEQszewGV1zVB8P/Rjzgx8To0gQPn49M4u/A1Mk mAzpUoKa05ILTKBm/bpWPYZPpg9PDqUxOYPsIDEAkc70BKMPTXxrYiE+LSfIzwaJ a8IRwOzNL7Iwc+zPNS/GrmRJyxymb4lmMD/fypk/YaumZ6j4Hbo+9R8Zct9gbZ5Q ZbKtz6kLhbkbNCc71bVMgk6yacSBx1ak8Xpd12HlW85NgOCoBj7/DI1Lb61x1ImY NYpSpmtfGGTkQLtBl5dTLefZOvL1dKSct9TMOsA2jzNqf3zA1YA6XOxPGHK/qtjq 3s9cN1sIVF/g7sm1+qoKXe0OTQrXHT7SX8BH9/tb3MiKO8ItactlQUJlYNR3WFSN zm1PNe5zWr+GWzV0iUrqoMN4XX8nThiFDOxZpOwBTZcUD6qtDFIZp41M3qxwFTbJ hCtSQ8gUO1Ce+xtOQYYOwEkRS7FZa1Z+p/lendTFuGDh6DcXy97SrKkTktM4Q98B LhqrwUzCdES0ecNDi2+P5y4Fc7M0cMMn9SnFvbSBObLB89TF9uzMIn8jUBCZMvrM eAeZlRBYk8F+6F12higaWqZyiBKIEubXo/Z8T0L2KEDm/z/ddJvhQgBKvWlf3rqi RToD446rda+RhFBnxLZ3mTui5nZ2WyKTOqhVqeBuriJhE/cTUaQHUBUrbOwx20kE Xb9mQ2n3GRk2157n1CLY =lW2i -----END PGP SIGNATURE----- Merge tag 'gpio-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio Pull GPIO tree bulk changes from Linus Walleij: "A big set this merge window, as we have much going on in this subsystem. The changes to other subsystems (notably a slew of ARM machines as I am doing away with their custom APIs) have all been ACKed to the extent possible. Major changes this time: - Some core improvements and cleanups to the new GPIO descriptor API. This seems to be working now so we can start the exodus to this API, moving gradually away from the global GPIO numberspace. - Incremental improvements to the ACPI GPIO core, and move the few GPIO ACPI clients we have to the GPIO descriptor API right *now* before we go any further. We actually managed to contain this *before* we started to litter the kernel with yet another hackish global numberspace for the ACPI GPIOs, which is a big win. - The RFkill GPIO driver and all platforms using it have been migrated to use the GPIO descriptors rather than fixed number assignments. Tegra machine has been migrated as part of this. - New drivers for MOXA ART, Xtensa GPIO32 and SMSC SCH311x. Those should be really good examples of how I expect a nice GPIO driver to look these days. - Do away with custom GPIO implementations on a major part of the ARM machines: ks8695, lpc32xx, mv78xx0. Make a first step towards the same in the horribly convoluted Samsung S3C include forest. We expect to continue to clean this up as we move forward. - Flag GPIO lines used for IRQ on adnp, bcm-kona, em, intel-mid and lynxpoint. This makes the GPIOlib core aware that a certain GPIO line is used for IRQs and can then enforce some semantics such as disallowing a GPIO line marked as in use for IRQ to be switched to output mode. - Drop all use of irq_set_chip_and_handler_name(). The name provided in these cases were just unhelpful tags like "mux" or "demux". - Extend the MCP23s08 driver to handle interrupts. - Minor incremental improvements for rcar, lynxpoint, em 74x164 and msm drivers. - Some non-urgent bug fixes here and there, duplicate #includes and that usual kind of cleanups" Fix up broken Kconfig file manually to make this all compile. * tag 'gpio-v3.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (71 commits) gpio: mcp23s08: fix casting caused build warning gpio: mcp23s08: depend on OF_GPIO gpio: mcp23s08: Add irq functionality for i2c chips ARM: S5P[v210|c100|64x0]: Fix build error gpio: pxa: clamp gpio get value to [0,1] ARM: s3c24xx: explicit dependency on <plat/gpio-cfg.h> ARM: S3C[24|64]xx: move includes back under <mach/> scope Documentation / ACPI: update to GPIO descriptor API gpio / ACPI: get rid of acpi_gpio.h gpio / ACPI: register to ACPI events automatically mmc: sdhci-acpi: convert to use GPIO descriptor API ARM: s3c24xx: fix build error gpio: f7188x: set can_sleep attribute gpio: samsung: Update documentation gpio: samsung: Remove hardware.h inclusion gpio: xtensa: depend on HAVE_XTENSA_GPIO32 gpio: clps711x: Enable driver compilation with COMPILE_TEST gpio: clps711x: Use of_match_ptr() net: rfkill: gpio: convert to descriptor-based GPIO interface leds: s3c24xx: Fix build failure ...
493 lines
13 KiB
C
493 lines
13 KiB
C
/*
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* Renesas R-Car GPIO Support
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*
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/err.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/slab.h>
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struct gpio_rcar_priv {
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void __iomem *base;
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spinlock_t lock;
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struct gpio_rcar_config config;
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struct platform_device *pdev;
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struct gpio_chip gpio_chip;
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struct irq_chip irq_chip;
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struct irq_domain *irq_domain;
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};
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#define IOINTSEL 0x00
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#define INOUTSEL 0x04
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#define OUTDT 0x08
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#define INDT 0x0c
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#define INTDT 0x10
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#define INTCLR 0x14
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#define INTMSK 0x18
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#define MSKCLR 0x1c
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#define POSNEG 0x20
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#define EDGLEVEL 0x24
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#define FILONOFF 0x28
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#define BOTHEDGE 0x4c
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#define RCAR_MAX_GPIO_PER_BANK 32
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static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
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{
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return ioread32(p->base + offs);
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}
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static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
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u32 value)
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{
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iowrite32(value, p->base + offs);
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}
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static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
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int bit, bool value)
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{
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u32 tmp = gpio_rcar_read(p, offs);
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if (value)
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tmp |= BIT(bit);
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else
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tmp &= ~BIT(bit);
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gpio_rcar_write(p, offs, tmp);
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}
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static void gpio_rcar_irq_disable(struct irq_data *d)
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{
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struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
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gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
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}
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static void gpio_rcar_irq_enable(struct irq_data *d)
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{
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struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
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gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
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}
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static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
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unsigned int hwirq,
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bool active_high_rising_edge,
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bool level_trigger,
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bool both)
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{
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unsigned long flags;
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/* follow steps in the GPIO documentation for
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* "Setting Edge-Sensitive Interrupt Input Mode" and
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* "Setting Level-Sensitive Interrupt Input Mode"
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*/
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spin_lock_irqsave(&p->lock, flags);
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/* Configure postive or negative logic in POSNEG */
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gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
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/* Configure edge or level trigger in EDGLEVEL */
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gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
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/* Select one edge or both edges in BOTHEDGE */
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if (p->config.has_both_edge_trigger)
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gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
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/* Select "Interrupt Input Mode" in IOINTSEL */
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gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
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/* Write INTCLR in case of edge trigger */
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if (!level_trigger)
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gpio_rcar_write(p, INTCLR, BIT(hwirq));
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spin_unlock_irqrestore(&p->lock, flags);
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}
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static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
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{
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struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
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unsigned int hwirq = irqd_to_hwirq(d);
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dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
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switch (type & IRQ_TYPE_SENSE_MASK) {
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case IRQ_TYPE_LEVEL_HIGH:
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gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
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false);
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break;
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case IRQ_TYPE_LEVEL_LOW:
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gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
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false);
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break;
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case IRQ_TYPE_EDGE_RISING:
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gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
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false);
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break;
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case IRQ_TYPE_EDGE_FALLING:
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gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
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false);
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break;
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case IRQ_TYPE_EDGE_BOTH:
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if (!p->config.has_both_edge_trigger)
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return -EINVAL;
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gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
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true);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
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{
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struct gpio_rcar_priv *p = dev_id;
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u32 pending;
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unsigned int offset, irqs_handled = 0;
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while ((pending = gpio_rcar_read(p, INTDT) &
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gpio_rcar_read(p, INTMSK))) {
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offset = __ffs(pending);
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gpio_rcar_write(p, INTCLR, BIT(offset));
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generic_handle_irq(irq_find_mapping(p->irq_domain, offset));
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irqs_handled++;
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}
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return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
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}
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static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
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{
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return container_of(chip, struct gpio_rcar_priv, gpio_chip);
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}
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static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
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unsigned int gpio,
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bool output)
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{
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struct gpio_rcar_priv *p = gpio_to_priv(chip);
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unsigned long flags;
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/* follow steps in the GPIO documentation for
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* "Setting General Output Mode" and
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* "Setting General Input Mode"
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*/
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spin_lock_irqsave(&p->lock, flags);
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/* Configure postive logic in POSNEG */
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gpio_rcar_modify_bit(p, POSNEG, gpio, false);
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/* Select "General Input/Output Mode" in IOINTSEL */
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gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
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/* Select Input Mode or Output Mode in INOUTSEL */
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gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
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spin_unlock_irqrestore(&p->lock, flags);
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}
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static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
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{
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return pinctrl_request_gpio(chip->base + offset);
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}
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static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
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{
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pinctrl_free_gpio(chip->base + offset);
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/* Set the GPIO as an input to ensure that the next GPIO request won't
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* drive the GPIO pin as an output.
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*/
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gpio_rcar_config_general_input_output_mode(chip, offset, false);
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}
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static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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gpio_rcar_config_general_input_output_mode(chip, offset, false);
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return 0;
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}
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static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
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{
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u32 bit = BIT(offset);
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/* testing on r8a7790 shows that INDT does not show correct pin state
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* when configured as output, so use OUTDT in case of output pins */
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if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit)
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return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit);
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else
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return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit);
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}
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static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct gpio_rcar_priv *p = gpio_to_priv(chip);
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unsigned long flags;
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spin_lock_irqsave(&p->lock, flags);
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gpio_rcar_modify_bit(p, OUTDT, offset, value);
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spin_unlock_irqrestore(&p->lock, flags);
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}
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static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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/* write GPIO value to output before selecting output mode of pin */
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gpio_rcar_set(chip, offset, value);
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gpio_rcar_config_general_input_output_mode(chip, offset, true);
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return 0;
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}
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static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
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}
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static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct gpio_rcar_priv *p = h->host_data;
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dev_dbg(&p->pdev->dev, "map hw irq = %d, irq = %d\n", (int)hwirq, irq);
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irq_set_chip_data(irq, h->host_data);
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irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq);
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set_irq_flags(irq, IRQF_VALID); /* kill me now */
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return 0;
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}
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static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
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.map = gpio_rcar_irq_domain_map,
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};
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struct gpio_rcar_info {
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bool has_both_edge_trigger;
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};
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static const struct of_device_id gpio_rcar_of_table[] = {
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{
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.compatible = "renesas,gpio-r8a7790",
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.data = (void *)&(const struct gpio_rcar_info) {
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.has_both_edge_trigger = true,
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},
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}, {
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.compatible = "renesas,gpio-r8a7791",
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.data = (void *)&(const struct gpio_rcar_info) {
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.has_both_edge_trigger = true,
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},
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}, {
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.compatible = "renesas,gpio-rcar",
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.data = (void *)&(const struct gpio_rcar_info) {
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.has_both_edge_trigger = false,
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},
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}, {
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/* Terminator */
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},
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};
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MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
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static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
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{
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struct gpio_rcar_config *pdata = dev_get_platdata(&p->pdev->dev);
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struct device_node *np = p->pdev->dev.of_node;
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struct of_phandle_args args;
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int ret;
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if (pdata) {
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p->config = *pdata;
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} else if (IS_ENABLED(CONFIG_OF) && np) {
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const struct of_device_id *match;
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const struct gpio_rcar_info *info;
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match = of_match_node(gpio_rcar_of_table, np);
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if (!match)
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return -EINVAL;
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info = match->data;
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ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
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&args);
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p->config.number_of_pins = ret == 0 ? args.args[2]
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: RCAR_MAX_GPIO_PER_BANK;
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p->config.gpio_base = -1;
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p->config.has_both_edge_trigger = info->has_both_edge_trigger;
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}
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if (p->config.number_of_pins == 0 ||
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p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) {
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dev_warn(&p->pdev->dev,
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"Invalid number of gpio lines %u, using %u\n",
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p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
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p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
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}
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return 0;
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}
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static int gpio_rcar_probe(struct platform_device *pdev)
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{
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struct gpio_rcar_priv *p;
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struct resource *io, *irq;
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struct gpio_chip *gpio_chip;
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struct irq_chip *irq_chip;
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const char *name = dev_name(&pdev->dev);
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int ret;
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p) {
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dev_err(&pdev->dev, "failed to allocate driver data\n");
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ret = -ENOMEM;
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goto err0;
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}
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p->pdev = pdev;
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spin_lock_init(&p->lock);
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/* Get device configuration from DT node or platform data. */
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ret = gpio_rcar_parse_pdata(p);
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if (ret < 0)
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return ret;
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|
|
|
platform_set_drvdata(pdev, p);
|
|
|
|
io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (!io || !irq) {
|
|
dev_err(&pdev->dev, "missing IRQ or IOMEM\n");
|
|
ret = -EINVAL;
|
|
goto err0;
|
|
}
|
|
|
|
p->base = devm_ioremap_nocache(&pdev->dev, io->start,
|
|
resource_size(io));
|
|
if (!p->base) {
|
|
dev_err(&pdev->dev, "failed to remap I/O memory\n");
|
|
ret = -ENXIO;
|
|
goto err0;
|
|
}
|
|
|
|
gpio_chip = &p->gpio_chip;
|
|
gpio_chip->request = gpio_rcar_request;
|
|
gpio_chip->free = gpio_rcar_free;
|
|
gpio_chip->direction_input = gpio_rcar_direction_input;
|
|
gpio_chip->get = gpio_rcar_get;
|
|
gpio_chip->direction_output = gpio_rcar_direction_output;
|
|
gpio_chip->set = gpio_rcar_set;
|
|
gpio_chip->to_irq = gpio_rcar_to_irq;
|
|
gpio_chip->label = name;
|
|
gpio_chip->dev = &pdev->dev;
|
|
gpio_chip->owner = THIS_MODULE;
|
|
gpio_chip->base = p->config.gpio_base;
|
|
gpio_chip->ngpio = p->config.number_of_pins;
|
|
|
|
irq_chip = &p->irq_chip;
|
|
irq_chip->name = name;
|
|
irq_chip->irq_mask = gpio_rcar_irq_disable;
|
|
irq_chip->irq_unmask = gpio_rcar_irq_enable;
|
|
irq_chip->irq_set_type = gpio_rcar_irq_set_type;
|
|
irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED
|
|
| IRQCHIP_MASK_ON_SUSPEND;
|
|
|
|
p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
|
|
p->config.number_of_pins,
|
|
p->config.irq_base,
|
|
&gpio_rcar_irq_domain_ops, p);
|
|
if (!p->irq_domain) {
|
|
ret = -ENXIO;
|
|
dev_err(&pdev->dev, "cannot initialize irq domain\n");
|
|
goto err0;
|
|
}
|
|
|
|
if (devm_request_irq(&pdev->dev, irq->start,
|
|
gpio_rcar_irq_handler, IRQF_SHARED, name, p)) {
|
|
dev_err(&pdev->dev, "failed to request IRQ\n");
|
|
ret = -ENOENT;
|
|
goto err1;
|
|
}
|
|
|
|
ret = gpiochip_add(gpio_chip);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "failed to add GPIO controller\n");
|
|
goto err1;
|
|
}
|
|
|
|
dev_info(&pdev->dev, "driving %d GPIOs\n", p->config.number_of_pins);
|
|
|
|
/* warn in case of mismatch if irq base is specified */
|
|
if (p->config.irq_base) {
|
|
ret = irq_find_mapping(p->irq_domain, 0);
|
|
if (p->config.irq_base != ret)
|
|
dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n",
|
|
p->config.irq_base, ret);
|
|
}
|
|
|
|
if (p->config.pctl_name) {
|
|
ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
|
|
gpio_chip->base, gpio_chip->ngpio);
|
|
if (ret < 0)
|
|
dev_warn(&pdev->dev, "failed to add pin range\n");
|
|
}
|
|
|
|
return 0;
|
|
|
|
err1:
|
|
irq_domain_remove(p->irq_domain);
|
|
err0:
|
|
return ret;
|
|
}
|
|
|
|
static int gpio_rcar_remove(struct platform_device *pdev)
|
|
{
|
|
struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
|
|
int ret;
|
|
|
|
ret = gpiochip_remove(&p->gpio_chip);
|
|
if (ret)
|
|
return ret;
|
|
|
|
irq_domain_remove(p->irq_domain);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver gpio_rcar_device_driver = {
|
|
.probe = gpio_rcar_probe,
|
|
.remove = gpio_rcar_remove,
|
|
.driver = {
|
|
.name = "gpio_rcar",
|
|
.of_match_table = of_match_ptr(gpio_rcar_of_table),
|
|
}
|
|
};
|
|
|
|
module_platform_driver(gpio_rcar_device_driver);
|
|
|
|
MODULE_AUTHOR("Magnus Damm");
|
|
MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
|
|
MODULE_LICENSE("GPL v2");
|