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c658eac628
The Xtensa architecture allows to define custom instructions and registers. Registers that are bound to a coprocessor are only accessible if the corresponding enable bit is set, which allows to implement a 'lazy' context switch mechanism. Other registers needs to be saved and restore at the time of the context switch or during interrupt handling. This patch adds support for these additional states: - save and restore registers that are used by the compiler upon interrupt entry and exit. - context switch additional registers unbound to any coprocessor - 'lazy' context switch of registers bound to a coprocessor - ptrace interface to provide access to additional registers - update configuration files in include/asm-xtensa/variant-fsf Signed-off-by: Chris Zankel <chris@zankel.net> |
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.. | ||
align.S | ||
asm-offsets.c | ||
coprocessor.S | ||
entry.S | ||
head.S | ||
init_task.c | ||
io.c | ||
irq.c | ||
Makefile | ||
module.c | ||
pci-dma.c | ||
pci.c | ||
platform.c | ||
process.c | ||
ptrace.c | ||
semaphore.c | ||
setup.c | ||
signal.c | ||
syscall.c | ||
time.c | ||
traps.c | ||
vectors.S | ||
vmlinux.lds.S | ||
xtensa_ksyms.c |