Scott Wood c60232029a powerpc/fsl: Force coherent memory on e500mc derivatives ... In CoreNet systems it is not allowed to mix M and non-M mappings to the same memory, and coherent DMA accesses are considered to be M mappings for this purpose. Ignoring this has been observed to cause hard lockups in non-SMP kernels on e6500. Furthermore, e6500 implements the LRAT (logical to real address table) which allows KVM guests to control the WIMGE bits. This means that KVM cannot force the M bit on the way it usually does, so the guest had better set it itself. Signed-off-by: Scott Wood <scottwood@freescale.com>		2015-08-07 23:00:01 -05:00
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asm	powerpc/fsl: Force coherent memory on e500mc derivatives	2015-08-07 23:00:01 -05:00
uapi/asm	powerpc/signal: Fix confusing header documentation in sigcontext.h	2015-07-16 16:14:40 +10:00