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660685d9d1
The MTD subsystem has historically tried to be as configurable as possible. The
side-effect of this is that its configuration menu is rather large, and we are
gradually shrinking it. For example, we recently merged partitions support with
the mtdcore.
This patch does the next step - it merges the mtdchar module to mtdcore. And in
this case this is not only about eliminating too fine-grained separation and
simplifying the configuration menu. This is also about eliminating seemingly
useless kernel module.
Indeed, mtdchar is a module that allows user-space making use of MTD devices
via /dev/mtd* character devices. If users do not enable it, they simply cannot
use MTD devices at all. They cannot read or write the flash contents. Is it a
sane and useful setup? I believe not. And everyone just enables mtdchar.
Having mtdchar separate is also a little bit harmful. People sometimes miss the
fact that they need to enable an additional configuration option to have
user-space MTD interfaces, and then they wonder why on earth the kernel does
not allow using the flash? They spend time asking around.
Thus, let's just get rid of this module and make it part of mtd core.
Note, mtdchar had additional configuration option to enable OTP interfaces,
which are present on some flashes. I removed that option as well - it saves a
really tiny amount space.
[dwmw2: Strictly speaking, you can mount file systems on MTD devices just
fine without the mtdchar (or mtdblock) devices; you just can't do
other manipulations directly on the underlying device. But still I
agree that it makes sense to make this unconditional. And Yay! we
get to kill off an instance of checking CONFIG_foo_MODULE, which is
an abomination that should never happen.]
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
235 lines
7.9 KiB
Plaintext
235 lines
7.9 KiB
Plaintext
menu "RAM/ROM/Flash chip drivers"
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depends on MTD!=n
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config MTD_CFI
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tristate "Detect flash chips by Common Flash Interface (CFI) probe"
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select MTD_GEN_PROBE
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select MTD_CFI_UTIL
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help
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The Common Flash Interface specification was developed by Intel,
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AMD and other flash manufactures that provides a universal method
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for probing the capabilities of flash devices. If you wish to
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support any device that is CFI-compliant, you need to enable this
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option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
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for more information on CFI.
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config MTD_JEDECPROBE
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tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
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select MTD_GEN_PROBE
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help
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This option enables JEDEC-style probing of flash chips which are not
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compatible with the Common Flash Interface, but will use the common
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CFI-targeted flash drivers for any chips which are identified which
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are in fact compatible in all but the probe method. This actually
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covers most AMD/Fujitsu-compatible chips and also non-CFI
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Intel chips.
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config MTD_GEN_PROBE
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tristate
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config MTD_CFI_ADV_OPTIONS
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bool "Flash chip driver advanced configuration options"
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depends on MTD_GEN_PROBE
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help
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If you need to specify a specific endianness for access to flash
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chips, or if you wish to reduce the size of the kernel by including
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support for only specific arrangements of flash chips, say 'Y'. This
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option does not directly affect the code, but will enable other
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configuration options which allow you to do so.
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If unsure, say 'N'.
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choice
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prompt "Flash cmd/query data swapping"
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depends on MTD_CFI_ADV_OPTIONS
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default MTD_CFI_NOSWAP
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---help---
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This option defines the way in which the CPU attempts to arrange
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data bits when writing the 'magic' commands to the chips. Saying
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'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
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enabled, means that the CPU will not do any swapping; the chips
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are expected to be wired to the CPU in 'host-endian' form.
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Specific arrangements are possible with the BIG_ENDIAN_BYTE and
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LITTLE_ENDIAN_BYTE, if the bytes are reversed.
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config MTD_CFI_NOSWAP
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bool "NO"
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config MTD_CFI_BE_BYTE_SWAP
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bool "BIG_ENDIAN_BYTE"
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config MTD_CFI_LE_BYTE_SWAP
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bool "LITTLE_ENDIAN_BYTE"
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endchoice
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config MTD_CFI_GEOMETRY
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bool "Specific CFI Flash geometry selection"
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depends on MTD_CFI_ADV_OPTIONS
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help
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This option does not affect the code directly, but will enable
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some other configuration options which would allow you to reduce
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the size of the kernel by including support for only certain
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arrangements of CFI chips. If unsure, say 'N' and all options
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which are supported by the current code will be enabled.
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config MTD_MAP_BANK_WIDTH_1
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bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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8 bits wide, say 'Y'.
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config MTD_MAP_BANK_WIDTH_2
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bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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16 bits wide, say 'Y'.
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config MTD_MAP_BANK_WIDTH_4
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bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
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default y
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help
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If you wish to support CFI devices on a physical bus which is
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32 bits wide, say 'Y'.
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config MTD_MAP_BANK_WIDTH_8
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bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
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default n
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help
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If you wish to support CFI devices on a physical bus which is
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64 bits wide, say 'Y'.
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config MTD_MAP_BANK_WIDTH_16
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bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
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default n
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help
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If you wish to support CFI devices on a physical bus which is
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128 bits wide, say 'Y'.
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config MTD_MAP_BANK_WIDTH_32
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bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
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default n
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help
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If you wish to support CFI devices on a physical bus which is
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256 bits wide, say 'Y'.
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config MTD_CFI_I1
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bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
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default y
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help
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If your flash chips are not interleaved - i.e. you only have one
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flash chip addressed by each bus cycle, then say 'Y'.
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config MTD_CFI_I2
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bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
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default y
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help
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If your flash chips are interleaved in pairs - i.e. you have two
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flash chips addressed by each bus cycle, then say 'Y'.
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config MTD_CFI_I4
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bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
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default n
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help
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If your flash chips are interleaved in fours - i.e. you have four
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flash chips addressed by each bus cycle, then say 'Y'.
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config MTD_CFI_I8
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bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
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default n
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help
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If your flash chips are interleaved in eights - i.e. you have eight
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flash chips addressed by each bus cycle, then say 'Y'.
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config MTD_OTP
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bool "Protection Registers aka one-time programmable (OTP) bits"
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depends on MTD_CFI_ADV_OPTIONS
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default n
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help
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This enables support for reading, writing and locking so called
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"Protection Registers" present on some flash chips.
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A subset of them are pre-programmed at the factory with a
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unique set of values. The rest is user-programmable.
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The user-programmable Protection Registers contain one-time
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programmable (OTP) bits; when programmed, register bits cannot be
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erased. Each Protection Register can be accessed multiple times to
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program individual bits, as long as the register remains unlocked.
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Each Protection Register has an associated Lock Register bit. When a
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Lock Register bit is programmed, the associated Protection Register
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can only be read; it can no longer be programmed. Additionally,
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because the Lock Register bits themselves are OTP, when programmed,
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Lock Register bits cannot be erased. Therefore, when a Protection
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Register is locked, it cannot be unlocked.
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This feature should therefore be used with extreme care. Any mistake
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in the programming of OTP bits will waste them.
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config MTD_CFI_INTELEXT
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tristate "Support for Intel/Sharp flash chips"
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depends on MTD_GEN_PROBE
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select MTD_CFI_UTIL
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help
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The Common Flash Interface defines a number of different command
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sets which a CFI-compliant chip may claim to implement. This code
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provides support for one of those command sets, used on Intel
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StrataFlash and other parts.
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config MTD_CFI_AMDSTD
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tristate "Support for AMD/Fujitsu/Spansion flash chips"
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depends on MTD_GEN_PROBE
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select MTD_CFI_UTIL
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help
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The Common Flash Interface defines a number of different command
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sets which a CFI-compliant chip may claim to implement. This code
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provides support for one of those command sets, used on chips
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including the AMD Am29LV320.
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config MTD_CFI_STAA
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tristate "Support for ST (Advanced Architecture) flash chips"
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depends on MTD_GEN_PROBE
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select MTD_CFI_UTIL
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help
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The Common Flash Interface defines a number of different command
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sets which a CFI-compliant chip may claim to implement. This code
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provides support for one of those command sets.
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config MTD_CFI_UTIL
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tristate
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config MTD_RAM
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tristate "Support for RAM chips in bus mapping"
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help
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This option enables basic support for RAM chips accessed through
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a bus mapping driver.
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config MTD_ROM
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tristate "Support for ROM chips in bus mapping"
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help
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This option enables basic support for ROM chips accessed through
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a bus mapping driver.
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config MTD_ABSENT
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tristate "Support for absent chips in bus mapping"
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help
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This option enables support for a dummy probing driver used to
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allocated placeholder MTD devices on systems that have socketed
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or removable media. Use of this driver as a fallback chip probe
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preserves the expected registration order of MTD device nodes on
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the system regardless of media presence. Device nodes created
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with this driver will return -ENODEV upon access.
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config MTD_XIP
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bool "XIP aware MTD support"
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depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
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default y if XIP_KERNEL
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help
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This allows MTD support to work with flash memory which is also
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used for XIP purposes. If you're not sure what this is all about
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then say N.
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endmenu
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