mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 09:56:11 +07:00
d0052ad90e
Now that invert_gpio arguments are unused, let's remove them. Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> Link: https://lore.kernel.org/r/64d766d1f8af2e22bce32f4ffa453f7234207ad6.1576031637.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
895 lines
22 KiB
C
895 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Secure Digital Host Controller Interface ACPI driver.
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*
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* Copyright (c) 2012, Intel Corporation.
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*/
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#include <linux/init.h>
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/dma-mapping.h>
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#include <linux/compiler.h>
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#include <linux/stddef.h>
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#include <linux/bitops.h>
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#include <linux/types.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/acpi.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/delay.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/pm.h>
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#include <linux/mmc/slot-gpio.h>
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#ifdef CONFIG_X86
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/iosf_mbi.h>
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#include <linux/pci.h>
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#endif
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#include "sdhci.h"
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enum {
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SDHCI_ACPI_SD_CD = BIT(0),
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SDHCI_ACPI_RUNTIME_PM = BIT(1),
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SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
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};
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struct sdhci_acpi_chip {
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const struct sdhci_ops *ops;
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unsigned int quirks;
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unsigned int quirks2;
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unsigned long caps;
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unsigned int caps2;
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mmc_pm_flag_t pm_caps;
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};
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struct sdhci_acpi_slot {
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const struct sdhci_acpi_chip *chip;
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unsigned int quirks;
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unsigned int quirks2;
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unsigned long caps;
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unsigned int caps2;
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mmc_pm_flag_t pm_caps;
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unsigned int flags;
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size_t priv_size;
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int (*probe_slot)(struct platform_device *, struct acpi_device *);
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int (*remove_slot)(struct platform_device *);
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int (*free_slot)(struct platform_device *pdev);
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int (*setup_host)(struct platform_device *pdev);
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};
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struct sdhci_acpi_host {
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struct sdhci_host *host;
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const struct sdhci_acpi_slot *slot;
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struct platform_device *pdev;
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bool use_runtime_pm;
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unsigned long private[0] ____cacheline_aligned;
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};
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static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
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{
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return (void *)c->private;
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}
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static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
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{
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return c->slot && (c->slot->flags & flag);
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}
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#define INTEL_DSM_HS_CAPS_SDR25 BIT(0)
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#define INTEL_DSM_HS_CAPS_DDR50 BIT(1)
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#define INTEL_DSM_HS_CAPS_SDR50 BIT(2)
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#define INTEL_DSM_HS_CAPS_SDR104 BIT(3)
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enum {
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INTEL_DSM_FNS = 0,
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INTEL_DSM_V18_SWITCH = 3,
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INTEL_DSM_V33_SWITCH = 4,
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INTEL_DSM_HS_CAPS = 8,
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};
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struct intel_host {
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u32 dsm_fns;
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u32 hs_caps;
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};
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static const guid_t intel_dsm_guid =
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GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
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0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
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static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
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unsigned int fn, u32 *result)
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{
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union acpi_object *obj;
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int err = 0;
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obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
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if (!obj)
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return -EOPNOTSUPP;
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if (obj->type == ACPI_TYPE_INTEGER) {
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*result = obj->integer.value;
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} else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
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size_t len = min_t(size_t, obj->buffer.length, 4);
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*result = 0;
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memcpy(result, obj->buffer.pointer, len);
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} else {
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dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
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__func__, fn, obj->type, obj->buffer.length);
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err = -EINVAL;
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}
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ACPI_FREE(obj);
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return err;
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}
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static int intel_dsm(struct intel_host *intel_host, struct device *dev,
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unsigned int fn, u32 *result)
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{
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if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
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return -EOPNOTSUPP;
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return __intel_dsm(intel_host, dev, fn, result);
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}
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static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
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struct mmc_host *mmc)
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{
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int err;
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intel_host->hs_caps = ~0;
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err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
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if (err) {
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pr_debug("%s: DSM not supported, error %d\n",
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mmc_hostname(mmc), err);
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return;
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}
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pr_debug("%s: DSM function mask %#x\n",
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mmc_hostname(mmc), intel_host->dsm_fns);
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intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
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}
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static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
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struct mmc_ios *ios)
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{
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struct device *dev = mmc_dev(mmc);
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struct sdhci_acpi_host *c = dev_get_drvdata(dev);
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struct intel_host *intel_host = sdhci_acpi_priv(c);
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unsigned int fn;
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u32 result = 0;
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int err;
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err = sdhci_start_signal_voltage_switch(mmc, ios);
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if (err)
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return err;
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switch (ios->signal_voltage) {
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case MMC_SIGNAL_VOLTAGE_330:
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fn = INTEL_DSM_V33_SWITCH;
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break;
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case MMC_SIGNAL_VOLTAGE_180:
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fn = INTEL_DSM_V18_SWITCH;
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break;
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default:
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return 0;
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}
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err = intel_dsm(intel_host, dev, fn, &result);
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pr_debug("%s: %s DSM fn %u error %d result %u\n",
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mmc_hostname(mmc), __func__, fn, err, result);
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return 0;
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}
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static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
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{
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u8 reg;
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reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
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reg |= 0x10;
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sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
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/* For eMMC, minimum is 1us but give it 9us for good measure */
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udelay(9);
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reg &= ~0x10;
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sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
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/* For eMMC, minimum is 200us but give it 300us for good measure */
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usleep_range(300, 1000);
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}
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static const struct sdhci_ops sdhci_acpi_ops_dflt = {
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.set_clock = sdhci_set_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static const struct sdhci_ops sdhci_acpi_ops_int = {
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.set_clock = sdhci_set_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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.hw_reset = sdhci_acpi_int_hw_reset,
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};
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static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
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.ops = &sdhci_acpi_ops_int,
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};
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#ifdef CONFIG_X86
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static bool sdhci_acpi_byt(void)
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{
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static const struct x86_cpu_id byt[] = {
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
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{}
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};
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return x86_match_cpu(byt);
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}
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static bool sdhci_acpi_cht(void)
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{
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static const struct x86_cpu_id cht[] = {
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{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
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{}
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};
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return x86_match_cpu(cht);
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}
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#define BYT_IOSF_SCCEP 0x63
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#define BYT_IOSF_OCP_NETCTRL0 0x1078
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#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
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static void sdhci_acpi_byt_setting(struct device *dev)
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{
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u32 val = 0;
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if (!sdhci_acpi_byt())
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return;
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if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
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&val)) {
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dev_err(dev, "%s read error\n", __func__);
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return;
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}
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if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
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return;
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val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
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if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
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val)) {
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dev_err(dev, "%s write error\n", __func__);
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return;
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}
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dev_dbg(dev, "%s completed\n", __func__);
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}
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static bool sdhci_acpi_byt_defer(struct device *dev)
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{
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if (!sdhci_acpi_byt())
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return false;
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if (!iosf_mbi_available())
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return true;
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sdhci_acpi_byt_setting(dev);
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return false;
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}
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static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
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unsigned int slot, unsigned int parent_slot)
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{
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struct pci_dev *dev, *parent, *from = NULL;
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while (1) {
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dev = pci_get_device(vendor, device, from);
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pci_dev_put(from);
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if (!dev)
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break;
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parent = pci_upstream_bridge(dev);
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if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
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parent && PCI_SLOT(parent->devfn) == parent_slot &&
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!pci_upstream_bridge(parent)) {
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pci_dev_put(dev);
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return true;
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}
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from = dev;
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}
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return false;
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}
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/*
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* GPDwin uses PCI wifi which conflicts with SDIO's use of
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* acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
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* problematic, but since SDIO is only used for wifi, the presence of the PCI
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* wifi card in the expected slot with an ACPI companion node, is used to
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* indicate that acpi_device_fix_up_power() should be avoided.
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*/
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static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
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{
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return sdhci_acpi_cht() &&
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acpi_dev_hid_uid_match(adev, "80860F14", "2") &&
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sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
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}
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#else
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static inline void sdhci_acpi_byt_setting(struct device *dev)
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{
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}
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static inline bool sdhci_acpi_byt_defer(struct device *dev)
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{
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return false;
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}
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static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
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{
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return false;
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}
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#endif
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static int bxt_get_cd(struct mmc_host *mmc)
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{
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int gpio_cd = mmc_gpio_get_cd(mmc);
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struct sdhci_host *host = mmc_priv(mmc);
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unsigned long flags;
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int ret = 0;
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if (!gpio_cd)
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return 0;
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spin_lock_irqsave(&host->lock, flags);
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if (host->flags & SDHCI_DEVICE_DEAD)
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goto out;
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ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
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out:
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spin_unlock_irqrestore(&host->lock, flags);
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return ret;
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}
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static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
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{
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struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
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struct intel_host *intel_host = sdhci_acpi_priv(c);
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struct sdhci_host *host = c->host;
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if (acpi_dev_hid_uid_match(adev, "80860F14", "1") &&
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sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
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sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
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host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
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if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL))
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host->mmc_host_ops.get_cd = bxt_get_cd;
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intel_dsm_init(intel_host, &pdev->dev, host->mmc);
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host->mmc_host_ops.start_signal_voltage_switch =
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intel_start_signal_voltage_switch;
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return 0;
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}
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static int intel_setup_host(struct platform_device *pdev)
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{
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struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
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struct intel_host *intel_host = sdhci_acpi_priv(c);
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if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
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c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
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if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
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c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
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if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
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c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
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if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
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c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
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return 0;
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}
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
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.chip = &sdhci_acpi_chip_int,
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.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
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MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
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MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
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.flags = SDHCI_ACPI_RUNTIME_PM,
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.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
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SDHCI_QUIRK_NO_LED,
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.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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SDHCI_QUIRK2_STOP_WITH_TC |
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SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
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.probe_slot = intel_probe_slot,
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.setup_host = intel_setup_host,
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.priv_size = sizeof(struct intel_host),
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};
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
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.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
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SDHCI_QUIRK_NO_LED |
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SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
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.quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
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.caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
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MMC_CAP_WAIT_WHILE_BUSY,
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.flags = SDHCI_ACPI_RUNTIME_PM,
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.pm_caps = MMC_PM_KEEP_POWER,
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.probe_slot = intel_probe_slot,
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.setup_host = intel_setup_host,
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.priv_size = sizeof(struct intel_host),
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};
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static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
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.flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
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SDHCI_ACPI_RUNTIME_PM,
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.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
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SDHCI_QUIRK_NO_LED,
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.quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
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SDHCI_QUIRK2_STOP_WITH_TC,
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.caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
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.probe_slot = intel_probe_slot,
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.setup_host = intel_setup_host,
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.priv_size = sizeof(struct intel_host),
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};
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#define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG 0x1a8
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#define VENDOR_SPECIFIC_PWRCTL_CTL_REG 0x1ac
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static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
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{
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struct sdhci_host *host = ptr;
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sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
|
|
sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
|
|
{
|
|
struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
|
|
struct sdhci_host *host = c->host;
|
|
int *irq = sdhci_acpi_priv(c);
|
|
|
|
*irq = -EINVAL;
|
|
|
|
if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
|
|
return 0;
|
|
|
|
*irq = platform_get_irq(pdev, 1);
|
|
if (*irq < 0)
|
|
return 0;
|
|
|
|
return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
|
|
IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
|
|
"sdhci_qcom", host);
|
|
}
|
|
|
|
static int qcom_free_slot(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
|
|
struct sdhci_host *host = c->host;
|
|
struct acpi_device *adev;
|
|
int *irq = sdhci_acpi_priv(c);
|
|
|
|
adev = ACPI_COMPANION(dev);
|
|
if (!adev)
|
|
return -ENODEV;
|
|
|
|
if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
|
|
return 0;
|
|
|
|
if (*irq < 0)
|
|
return 0;
|
|
|
|
free_irq(*irq, host);
|
|
return 0;
|
|
}
|
|
|
|
static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
|
|
.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
|
|
.quirks2 = SDHCI_QUIRK2_NO_1_8_V,
|
|
.caps = MMC_CAP_NONREMOVABLE,
|
|
.priv_size = sizeof(int),
|
|
.probe_slot = qcom_probe_slot,
|
|
.free_slot = qcom_free_slot,
|
|
};
|
|
|
|
static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
|
|
.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
|
|
.caps = MMC_CAP_NONREMOVABLE,
|
|
};
|
|
|
|
/* AMD sdhci reset dll register. */
|
|
#define SDHCI_AMD_RESET_DLL_REGISTER 0x908
|
|
|
|
static int amd_select_drive_strength(struct mmc_card *card,
|
|
unsigned int max_dtr, int host_drv,
|
|
int card_drv, int *drv_type)
|
|
{
|
|
return MMC_SET_DRIVER_TYPE_A;
|
|
}
|
|
|
|
static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
|
|
{
|
|
/* AMD Platform requires dll setting */
|
|
sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
|
|
usleep_range(10, 20);
|
|
sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
|
|
}
|
|
|
|
/*
|
|
* For AMD Platform it is required to disable the tuning
|
|
* bit first controller to bring to HS Mode from HS200
|
|
* mode, later enable to tune to HS400 mode.
|
|
*/
|
|
static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|
{
|
|
struct sdhci_host *host = mmc_priv(mmc);
|
|
unsigned int old_timing = host->timing;
|
|
|
|
sdhci_set_ios(mmc, ios);
|
|
if (old_timing == MMC_TIMING_MMC_HS200 &&
|
|
ios->timing == MMC_TIMING_MMC_HS)
|
|
sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
|
|
if (old_timing != MMC_TIMING_MMC_HS400 &&
|
|
ios->timing == MMC_TIMING_MMC_HS400) {
|
|
sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
|
|
sdhci_acpi_amd_hs400_dll(host);
|
|
}
|
|
}
|
|
|
|
static const struct sdhci_ops sdhci_acpi_ops_amd = {
|
|
.set_clock = sdhci_set_clock,
|
|
.set_bus_width = sdhci_set_bus_width,
|
|
.reset = sdhci_reset,
|
|
.set_uhs_signaling = sdhci_set_uhs_signaling,
|
|
};
|
|
|
|
static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
|
|
.ops = &sdhci_acpi_ops_amd,
|
|
};
|
|
|
|
static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
|
|
struct acpi_device *adev)
|
|
{
|
|
struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
|
|
struct sdhci_host *host = c->host;
|
|
|
|
sdhci_read_caps(host);
|
|
if (host->caps1 & SDHCI_SUPPORT_DDR50)
|
|
host->mmc->caps = MMC_CAP_1_8V_DDR;
|
|
|
|
if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
|
|
(host->mmc->caps & MMC_CAP_1_8V_DDR))
|
|
host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
|
|
|
|
host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
|
|
host->mmc_host_ops.set_ios = amd_set_ios;
|
|
return 0;
|
|
}
|
|
|
|
static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
|
|
.chip = &sdhci_acpi_chip_amd,
|
|
.caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
|
|
.quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE |
|
|
SDHCI_QUIRK_32BIT_ADMA_SIZE,
|
|
.probe_slot = sdhci_acpi_emmc_amd_probe_slot,
|
|
};
|
|
|
|
struct sdhci_acpi_uid_slot {
|
|
const char *hid;
|
|
const char *uid;
|
|
const struct sdhci_acpi_slot *slot;
|
|
};
|
|
|
|
static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
|
|
{ "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
|
|
{ "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
|
|
{ "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
|
|
{ "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
|
|
{ "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
|
|
{ "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
|
|
{ "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
|
|
{ "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
|
|
{ "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
|
|
{ "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
|
|
{ "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
|
|
{ "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
|
|
{ "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
|
|
{ "PNP0D40" },
|
|
{ "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
|
|
{ "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
|
|
{ "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
|
|
{ },
|
|
};
|
|
|
|
static const struct acpi_device_id sdhci_acpi_ids[] = {
|
|
{ "80865ACA" },
|
|
{ "80865ACC" },
|
|
{ "80865AD0" },
|
|
{ "80860F14" },
|
|
{ "80860F16" },
|
|
{ "INT33BB" },
|
|
{ "INT33C6" },
|
|
{ "INT3436" },
|
|
{ "INT344D" },
|
|
{ "PNP0D40" },
|
|
{ "QCOM8051" },
|
|
{ "QCOM8052" },
|
|
{ "AMDI0040" },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
|
|
|
|
static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev)
|
|
{
|
|
const struct sdhci_acpi_uid_slot *u;
|
|
|
|
for (u = sdhci_acpi_uids; u->hid; u++) {
|
|
if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
|
|
return u->slot;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
static int sdhci_acpi_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
const struct sdhci_acpi_slot *slot;
|
|
struct acpi_device *device, *child;
|
|
struct sdhci_acpi_host *c;
|
|
struct sdhci_host *host;
|
|
struct resource *iomem;
|
|
resource_size_t len;
|
|
size_t priv_size;
|
|
int err;
|
|
|
|
device = ACPI_COMPANION(dev);
|
|
if (!device)
|
|
return -ENODEV;
|
|
|
|
slot = sdhci_acpi_get_slot(device);
|
|
|
|
/* Power on the SDHCI controller and its children */
|
|
acpi_device_fix_up_power(device);
|
|
if (!sdhci_acpi_no_fixup_child_power(device)) {
|
|
list_for_each_entry(child, &device->children, node)
|
|
if (child->status.present && child->status.enabled)
|
|
acpi_device_fix_up_power(child);
|
|
}
|
|
|
|
if (sdhci_acpi_byt_defer(dev))
|
|
return -EPROBE_DEFER;
|
|
|
|
iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!iomem)
|
|
return -ENOMEM;
|
|
|
|
len = resource_size(iomem);
|
|
if (len < 0x100)
|
|
dev_err(dev, "Invalid iomem size!\n");
|
|
|
|
if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
|
|
return -ENOMEM;
|
|
|
|
priv_size = slot ? slot->priv_size : 0;
|
|
host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
|
|
if (IS_ERR(host))
|
|
return PTR_ERR(host);
|
|
|
|
c = sdhci_priv(host);
|
|
c->host = host;
|
|
c->slot = slot;
|
|
c->pdev = pdev;
|
|
c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
|
|
|
|
platform_set_drvdata(pdev, c);
|
|
|
|
host->hw_name = "ACPI";
|
|
host->ops = &sdhci_acpi_ops_dflt;
|
|
host->irq = platform_get_irq(pdev, 0);
|
|
if (host->irq < 0) {
|
|
err = -EINVAL;
|
|
goto err_free;
|
|
}
|
|
|
|
host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
|
|
resource_size(iomem));
|
|
if (host->ioaddr == NULL) {
|
|
err = -ENOMEM;
|
|
goto err_free;
|
|
}
|
|
|
|
if (c->slot) {
|
|
if (c->slot->probe_slot) {
|
|
err = c->slot->probe_slot(pdev, device);
|
|
if (err)
|
|
goto err_free;
|
|
}
|
|
if (c->slot->chip) {
|
|
host->ops = c->slot->chip->ops;
|
|
host->quirks |= c->slot->chip->quirks;
|
|
host->quirks2 |= c->slot->chip->quirks2;
|
|
host->mmc->caps |= c->slot->chip->caps;
|
|
host->mmc->caps2 |= c->slot->chip->caps2;
|
|
host->mmc->pm_caps |= c->slot->chip->pm_caps;
|
|
}
|
|
host->quirks |= c->slot->quirks;
|
|
host->quirks2 |= c->slot->quirks2;
|
|
host->mmc->caps |= c->slot->caps;
|
|
host->mmc->caps2 |= c->slot->caps2;
|
|
host->mmc->pm_caps |= c->slot->pm_caps;
|
|
}
|
|
|
|
host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
|
|
|
|
if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
|
|
bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
|
|
|
|
err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0);
|
|
if (err) {
|
|
if (err == -EPROBE_DEFER)
|
|
goto err_free;
|
|
dev_warn(dev, "failed to setup card detect gpio\n");
|
|
c->use_runtime_pm = false;
|
|
}
|
|
}
|
|
|
|
err = sdhci_setup_host(host);
|
|
if (err)
|
|
goto err_free;
|
|
|
|
if (c->slot && c->slot->setup_host) {
|
|
err = c->slot->setup_host(pdev);
|
|
if (err)
|
|
goto err_cleanup;
|
|
}
|
|
|
|
err = __sdhci_add_host(host);
|
|
if (err)
|
|
goto err_cleanup;
|
|
|
|
if (c->use_runtime_pm) {
|
|
pm_runtime_set_active(dev);
|
|
pm_suspend_ignore_children(dev, 1);
|
|
pm_runtime_set_autosuspend_delay(dev, 50);
|
|
pm_runtime_use_autosuspend(dev);
|
|
pm_runtime_enable(dev);
|
|
}
|
|
|
|
device_enable_async_suspend(dev);
|
|
|
|
return 0;
|
|
|
|
err_cleanup:
|
|
sdhci_cleanup_host(c->host);
|
|
err_free:
|
|
if (c->slot && c->slot->free_slot)
|
|
c->slot->free_slot(pdev);
|
|
|
|
sdhci_free_host(c->host);
|
|
return err;
|
|
}
|
|
|
|
static int sdhci_acpi_remove(struct platform_device *pdev)
|
|
{
|
|
struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
|
|
struct device *dev = &pdev->dev;
|
|
int dead;
|
|
|
|
if (c->use_runtime_pm) {
|
|
pm_runtime_get_sync(dev);
|
|
pm_runtime_disable(dev);
|
|
pm_runtime_put_noidle(dev);
|
|
}
|
|
|
|
if (c->slot && c->slot->remove_slot)
|
|
c->slot->remove_slot(pdev);
|
|
|
|
dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
|
|
sdhci_remove_host(c->host, dead);
|
|
|
|
if (c->slot && c->slot->free_slot)
|
|
c->slot->free_slot(pdev);
|
|
|
|
sdhci_free_host(c->host);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
|
|
static int sdhci_acpi_suspend(struct device *dev)
|
|
{
|
|
struct sdhci_acpi_host *c = dev_get_drvdata(dev);
|
|
struct sdhci_host *host = c->host;
|
|
|
|
if (host->tuning_mode != SDHCI_TUNING_MODE_3)
|
|
mmc_retune_needed(host->mmc);
|
|
|
|
return sdhci_suspend_host(host);
|
|
}
|
|
|
|
static int sdhci_acpi_resume(struct device *dev)
|
|
{
|
|
struct sdhci_acpi_host *c = dev_get_drvdata(dev);
|
|
|
|
sdhci_acpi_byt_setting(&c->pdev->dev);
|
|
|
|
return sdhci_resume_host(c->host);
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int sdhci_acpi_runtime_suspend(struct device *dev)
|
|
{
|
|
struct sdhci_acpi_host *c = dev_get_drvdata(dev);
|
|
struct sdhci_host *host = c->host;
|
|
|
|
if (host->tuning_mode != SDHCI_TUNING_MODE_3)
|
|
mmc_retune_needed(host->mmc);
|
|
|
|
return sdhci_runtime_suspend_host(host);
|
|
}
|
|
|
|
static int sdhci_acpi_runtime_resume(struct device *dev)
|
|
{
|
|
struct sdhci_acpi_host *c = dev_get_drvdata(dev);
|
|
|
|
sdhci_acpi_byt_setting(&c->pdev->dev);
|
|
|
|
return sdhci_runtime_resume_host(c->host, 0);
|
|
}
|
|
|
|
#endif
|
|
|
|
static const struct dev_pm_ops sdhci_acpi_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
|
|
SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
|
|
sdhci_acpi_runtime_resume, NULL)
|
|
};
|
|
|
|
static struct platform_driver sdhci_acpi_driver = {
|
|
.driver = {
|
|
.name = "sdhci-acpi",
|
|
.acpi_match_table = sdhci_acpi_ids,
|
|
.pm = &sdhci_acpi_pm_ops,
|
|
},
|
|
.probe = sdhci_acpi_probe,
|
|
.remove = sdhci_acpi_remove,
|
|
};
|
|
|
|
module_platform_driver(sdhci_acpi_driver);
|
|
|
|
MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
|
|
MODULE_AUTHOR("Adrian Hunter");
|
|
MODULE_LICENSE("GPL v2");
|