mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1a9b4993b7
Pull MIPS updates from Ralf Baechle: "The lion share of this pull request are fixes for clk-related breakage caused by other changes during this merge window. For some platforms the fix was as simple as selecting HAVE_CLK, for others like the Loongson 2 significant restructuring was required. The remainder are changes required to get the Lantiq code to work again." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Loongson 2: Sort out clock managment. MIPS: Loongson 1: more clk support and add select HAVE_CLK MIPS: txx9: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: BCM63xx: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: AR7: Fix redefinition of clk_* by adding select HAVE_CLK MIPS: Lantiq: Platform specific CLK fixup MIPS: Lantiq: Add device_tree_init function MIPS: Lantiq: Fix interface clock and PCI control register offset |
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.. | ||
alchemy | ||
ar7 | ||
ath79 | ||
bcm47xx | ||
bcm63xx | ||
boot | ||
cavium-octeon | ||
cobalt | ||
configs | ||
dec | ||
emma | ||
fw | ||
include/asm | ||
jazz | ||
jz4740 | ||
kernel | ||
lantiq | ||
lasat | ||
lib | ||
loongson | ||
loongson1 | ||
math-emu | ||
mipssim | ||
mm | ||
mti-malta | ||
netlogic | ||
oprofile | ||
pci | ||
pmc-sierra | ||
pnx833x | ||
pnx8550 | ||
power | ||
powertv | ||
rb532 | ||
sgi-ip22 | ||
sgi-ip27 | ||
sgi-ip32 | ||
sibyte | ||
sni | ||
txx9 | ||
vr41xx | ||
wrppmc | ||
Kbuild | ||
Kbuild.platforms | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |