mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 13:56:53 +07:00
c65f2abf54
ixp2xxx platforms have had no real changes since ~2006 and the maintainer has said on irc that they can be removed: 13:05 < nico> do you still care about ixp2000? 13:22 < lennert> not really, no 13:58 < nico> do you think we could remove it from the kernel tree? 14:01 < lennert> go for it, and remove ixp23xx too while you're at it Removing will help simplify ARM consolidation in general and PCI re-work specifically. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Randy Dunlap <rdunlap@xenotime.net> Acked-by: Lennert Buytenhek <buytenh@wantstofly.org>
35 lines
877 B
ArmAsm
35 lines
877 B
ArmAsm
/*
|
|
* linux/arch/arm/boot/compressed/head-xscale.S
|
|
*
|
|
* XScale specific tweaks. This is merged into head.S by the linker.
|
|
*
|
|
*/
|
|
|
|
#include <linux/linkage.h>
|
|
|
|
.section ".start", "ax"
|
|
|
|
__XScale_start:
|
|
|
|
@ Preserve r8/r7 i.e. kernel entry values
|
|
|
|
@ Data cache might be active.
|
|
@ Be sure to flush kernel binary out of the cache,
|
|
@ whatever state it is, before it is turned off.
|
|
@ This is done by fetching through currently executed
|
|
@ memory to be sure we hit the same cache.
|
|
bic r2, pc, #0x1f
|
|
add r3, r2, #0x10000 @ 64 kb is quite enough...
|
|
1: ldr r0, [r2], #32
|
|
teq r2, r3
|
|
bne 1b
|
|
mcr p15, 0, r0, c7, c10, 4 @ drain WB
|
|
mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
|
|
|
|
@ disabling MMU and caches
|
|
mrc p15, 0, r0, c1, c0, 0 @ read control reg
|
|
bic r0, r0, #0x05 @ clear DC, MMU
|
|
bic r0, r0, #0x1000 @ clear Icache
|
|
mcr p15, 0, r0, c1, c0, 0
|
|
|