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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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58de77545e
Currently, flush_icache_all is macro-expanded into a SBI call, yet no asm/sbi.h is included in asm/cacheflush.h. This could be moved to mm/cacheflush.c instead (SBI call will dominate performance-wise and there is no worry to not have it inlined. Currently, flush_icache_mm stays in kernel/smp.c, which looks like a hack to prevent it from being compiled when CONFIG_SMP=n. It should also be in mm/cacheflush.c. Signed-off-by: Gary Guo <gary@garyguo.net> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
208 lines
4.5 KiB
C
208 lines
4.5 KiB
C
/*
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* SMP initialisation and IPI support
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* Based on arch/arm64/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2015 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/delay.h>
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#include <asm/sbi.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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enum ipi_message_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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IPI_MAX
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};
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unsigned long __cpuid_to_hartid_map[NR_CPUS] = {
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[0 ... NR_CPUS-1] = INVALID_HARTID
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};
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void __init smp_setup_processor_id(void)
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{
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cpuid_to_hartid_map(0) = boot_cpu_hartid;
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}
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/* A collection of single bit ipi messages. */
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static struct {
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unsigned long stats[IPI_MAX] ____cacheline_aligned;
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unsigned long bits ____cacheline_aligned;
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} ipi_data[NR_CPUS] __cacheline_aligned;
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int riscv_hartid_to_cpuid(int hartid)
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{
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int i;
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for (i = 0; i < NR_CPUS; i++)
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if (cpuid_to_hartid_map(i) == hartid)
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return i;
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pr_err("Couldn't find cpu id for hartid [%d]\n", hartid);
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return i;
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}
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void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
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{
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int cpu;
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for_each_cpu(cpu, in)
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cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
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}
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bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
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{
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return phys_id == cpuid_to_hartid_map(cpu);
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}
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/* Unsupported */
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int setup_profiling_timer(unsigned int multiplier)
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{
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return -EINVAL;
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}
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static void ipi_stop(void)
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{
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set_cpu_online(smp_processor_id(), false);
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while (1)
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wait_for_interrupt();
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}
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void riscv_software_interrupt(void)
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{
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unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
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unsigned long *stats = ipi_data[smp_processor_id()].stats;
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/* Clear pending IPI */
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csr_clear(CSR_SIP, SIE_SSIE);
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while (true) {
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unsigned long ops;
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/* Order bit clearing and data access. */
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mb();
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ops = xchg(pending_ipis, 0);
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if (ops == 0)
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return;
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if (ops & (1 << IPI_RESCHEDULE)) {
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stats[IPI_RESCHEDULE]++;
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scheduler_ipi();
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}
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if (ops & (1 << IPI_CALL_FUNC)) {
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stats[IPI_CALL_FUNC]++;
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generic_smp_call_function_interrupt();
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}
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if (ops & (1 << IPI_CPU_STOP)) {
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stats[IPI_CPU_STOP]++;
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ipi_stop();
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}
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BUG_ON((ops >> IPI_MAX) != 0);
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/* Order data access and bit testing. */
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mb();
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}
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}
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static void
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send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
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{
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int cpuid, hartid;
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struct cpumask hartid_mask;
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cpumask_clear(&hartid_mask);
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mb();
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for_each_cpu(cpuid, to_whom) {
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set_bit(operation, &ipi_data[cpuid].bits);
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hartid = cpuid_to_hartid_map(cpuid);
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cpumask_set_cpu(hartid, &hartid_mask);
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}
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mb();
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sbi_send_ipi(cpumask_bits(&hartid_mask));
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}
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static const char * const ipi_names[] = {
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[IPI_RESCHEDULE] = "Rescheduling interrupts",
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[IPI_CALL_FUNC] = "Function call interrupts",
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[IPI_CPU_STOP] = "CPU stop interrupts",
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};
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void show_ipi_stats(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < IPI_MAX; i++) {
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seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
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prec >= 4 ? " " : "");
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for_each_online_cpu(cpu)
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seq_printf(p, "%10lu ", ipi_data[cpu].stats[i]);
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seq_printf(p, " %s\n", ipi_names[i]);
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}
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}
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void arch_send_call_function_ipi_mask(struct cpumask *mask)
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{
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send_ipi_message(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
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}
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void smp_send_stop(void)
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{
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unsigned long timeout;
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if (num_online_cpus() > 1) {
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cpumask_t mask;
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cpumask_copy(&mask, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &mask);
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if (system_state <= SYSTEM_RUNNING)
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pr_crit("SMP: stopping secondary CPUs\n");
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send_ipi_message(&mask, IPI_CPU_STOP);
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}
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/* Wait up to one second for other CPUs to stop */
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timeout = USEC_PER_SEC;
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while (num_online_cpus() > 1 && timeout--)
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udelay(1);
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if (num_online_cpus() > 1)
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pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
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cpumask_pr_args(cpu_online_mask));
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}
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void smp_send_reschedule(int cpu)
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{
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send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
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}
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