Paulo Zanoni c50dfe79ec drm/i915/icl: don't set CNL_DDI_CLOCK_REG_ACCESS_ON anymore ... The new recommendation from the spec is to simply not set this bit anymore. Not setting the bit would prevent some hangs that our driver manages to avoid since commit c8af5274c3 ("drm/i915: enable the pipe/transcoder/planes later on HSW+"), and the theoretical downside of not setting the bit doesn't seem realistic according to the HW team. Let's follow their recommendation. BSpec: 20233 References: commit c8af5274c3 ("drm/i915: enable the pipe/transcoder/planes later on HSW+") Cc: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180726001229.13791-1-paulo.r.zanoni@intel.com		2018-07-27 15:52:33 -07:00
..
drm	drm/i915/icl: don't set CNL_DDI_CLOCK_REG_ACCESS_ON anymore	2018-07-27 15:52:33 -07:00
host1x	drm for v4.18-rc1	2018-06-06 08:16:33 -07:00
ipu-v3	gpu: ipu-v3: prg: avoid possible array underflow	2018-03-15 17:52:08 +01:00
vga	docs: Fix some broken references	2018-06-15 18:10:01 -03:00
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