Arun Siluvery c4db759919 drm/i915/gen8: Re-order init pipe_control in lrc mode ... Some of the WA applied using WA batch buffers perform writes to scratch page. In the current flow WA are initialized before scratch obj is allocated. This patch reorders intel_init_pipe_control() to have a valid scratch obj before we initialize WA. v2: Check for valid scratch page before initializing WA as some of them perform writes to it. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Dave Gordon <david.s.gordon@intel.com> Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>		2015-06-23 14:01:40 +02:00
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drm	drm/i915/gen8: Re-order init pipe_control in lrc mode	2015-06-23 14:01:40 +02:00
host1x
ipu-v3
vga
Makefile