mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
7179621023
Fix the swapped arguments in the clock failure dev_err. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
394 lines
9.6 KiB
C
394 lines
9.6 KiB
C
/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* Copyright (C) 2014 Linaro.
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* Viresh Kumar <viresh.kumar@linaro.org>
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*
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* The OPP code in function set_target() is reused from
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* drivers/cpufreq/omap-cpufreq.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/clk.h>
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#include <linux/cpu.h>
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#include <linux/cpu_cooling.h>
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#include <linux/cpufreq.h>
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#include <linux/cpufreq-dt.h>
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pm_opp.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/thermal.h>
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struct private_data {
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struct device *cpu_dev;
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struct regulator *cpu_reg;
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struct thermal_cooling_device *cdev;
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unsigned int voltage_tolerance; /* in percentage */
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};
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static int set_target(struct cpufreq_policy *policy, unsigned int index)
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{
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struct dev_pm_opp *opp;
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struct cpufreq_frequency_table *freq_table = policy->freq_table;
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struct clk *cpu_clk = policy->clk;
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struct private_data *priv = policy->driver_data;
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struct device *cpu_dev = priv->cpu_dev;
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struct regulator *cpu_reg = priv->cpu_reg;
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unsigned long volt = 0, volt_old = 0, tol = 0;
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unsigned int old_freq, new_freq;
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long freq_Hz, freq_exact;
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int ret;
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freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
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if (freq_Hz <= 0)
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freq_Hz = freq_table[index].frequency * 1000;
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freq_exact = freq_Hz;
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new_freq = freq_Hz / 1000;
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old_freq = clk_get_rate(cpu_clk) / 1000;
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if (!IS_ERR(cpu_reg)) {
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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dev_err(cpu_dev, "failed to find OPP for %ld\n",
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freq_Hz);
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return PTR_ERR(opp);
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}
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volt = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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tol = volt * priv->voltage_tolerance / 100;
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volt_old = regulator_get_voltage(cpu_reg);
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}
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dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
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old_freq / 1000, volt_old ? volt_old / 1000 : -1,
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new_freq / 1000, volt ? volt / 1000 : -1);
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/* scaling up? scale voltage before frequency */
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if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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dev_err(cpu_dev, "failed to scale voltage up: %d\n",
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ret);
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return ret;
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}
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}
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ret = clk_set_rate(cpu_clk, freq_exact);
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if (ret) {
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dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
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if (!IS_ERR(cpu_reg))
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regulator_set_voltage_tol(cpu_reg, volt_old, tol);
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return ret;
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}
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/* scaling down? scale voltage after frequency */
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if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
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ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
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if (ret) {
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dev_err(cpu_dev, "failed to scale voltage down: %d\n",
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ret);
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clk_set_rate(cpu_clk, old_freq * 1000);
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}
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}
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return ret;
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}
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static int allocate_resources(int cpu, struct device **cdev,
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struct regulator **creg, struct clk **cclk)
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{
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struct device *cpu_dev;
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struct regulator *cpu_reg;
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struct clk *cpu_clk;
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int ret = 0;
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char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
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cpu_dev = get_cpu_device(cpu);
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if (!cpu_dev) {
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pr_err("failed to get cpu%d device\n", cpu);
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return -ENODEV;
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}
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/* Try "cpu0" for older DTs */
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if (!cpu)
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reg = reg_cpu0;
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else
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reg = reg_cpu;
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try_again:
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cpu_reg = regulator_get_optional(cpu_dev, reg);
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if (IS_ERR(cpu_reg)) {
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/*
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* If cpu's regulator supply node is present, but regulator is
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* not yet registered, we should try defering probe.
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*/
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if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
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dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
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cpu);
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return -EPROBE_DEFER;
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}
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/* Try with "cpu-supply" */
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if (reg == reg_cpu0) {
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reg = reg_cpu;
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goto try_again;
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}
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dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
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cpu, PTR_ERR(cpu_reg));
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}
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cpu_clk = clk_get(cpu_dev, NULL);
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if (IS_ERR(cpu_clk)) {
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/* put regulator */
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if (!IS_ERR(cpu_reg))
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regulator_put(cpu_reg);
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ret = PTR_ERR(cpu_clk);
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/*
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* If cpu's clk node is present, but clock is not yet
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* registered, we should try defering probe.
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*/
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if (ret == -EPROBE_DEFER)
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dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
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else
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dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
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ret);
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} else {
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*cdev = cpu_dev;
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*creg = cpu_reg;
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*cclk = cpu_clk;
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}
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return ret;
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}
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static int cpufreq_init(struct cpufreq_policy *policy)
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{
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struct cpufreq_dt_platform_data *pd;
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struct cpufreq_frequency_table *freq_table;
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struct thermal_cooling_device *cdev;
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struct device_node *np;
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struct private_data *priv;
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struct device *cpu_dev;
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struct regulator *cpu_reg;
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struct clk *cpu_clk;
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unsigned long min_uV = ~0, max_uV = 0;
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unsigned int transition_latency;
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int ret;
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ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
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if (ret) {
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pr_err("%s: Failed to allocate resources\n: %d", __func__, ret);
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return ret;
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}
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np = of_node_get(cpu_dev->of_node);
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if (!np) {
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dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
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ret = -ENOENT;
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goto out_put_reg_clk;
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}
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/* OPPs might be populated at runtime, don't check for error here */
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of_init_opp_table(cpu_dev);
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priv = kzalloc(sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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goto out_put_node;
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}
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of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
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if (of_property_read_u32(np, "clock-latency", &transition_latency))
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transition_latency = CPUFREQ_ETERNAL;
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if (!IS_ERR(cpu_reg)) {
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unsigned long opp_freq = 0;
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/*
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* Disable any OPPs where the connected regulator isn't able to
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* provide the specified voltage and record minimum and maximum
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* voltage levels.
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*/
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while (1) {
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struct dev_pm_opp *opp;
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unsigned long opp_uV, tol_uV;
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rcu_read_lock();
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opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
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if (IS_ERR(opp)) {
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rcu_read_unlock();
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break;
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}
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opp_uV = dev_pm_opp_get_voltage(opp);
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rcu_read_unlock();
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tol_uV = opp_uV * priv->voltage_tolerance / 100;
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if (regulator_is_supported_voltage(cpu_reg, opp_uV,
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opp_uV + tol_uV)) {
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if (opp_uV < min_uV)
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min_uV = opp_uV;
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if (opp_uV > max_uV)
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max_uV = opp_uV;
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} else {
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dev_pm_opp_disable(cpu_dev, opp_freq);
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}
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opp_freq++;
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}
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ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
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if (ret > 0)
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transition_latency += ret * 1000;
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}
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ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
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if (ret) {
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pr_err("failed to init cpufreq table: %d\n", ret);
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goto out_free_priv;
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}
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/*
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* For now, just loading the cooling device;
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* thermal DT code takes care of matching them.
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*/
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if (of_find_property(np, "#cooling-cells", NULL)) {
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cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
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if (IS_ERR(cdev))
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dev_err(cpu_dev,
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"running cpufreq without cooling device: %ld\n",
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PTR_ERR(cdev));
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else
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priv->cdev = cdev;
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}
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priv->cpu_dev = cpu_dev;
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priv->cpu_reg = cpu_reg;
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policy->driver_data = priv;
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policy->clk = cpu_clk;
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ret = cpufreq_table_validate_and_show(policy, freq_table);
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if (ret) {
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dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
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ret);
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goto out_cooling_unregister;
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}
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policy->cpuinfo.transition_latency = transition_latency;
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pd = cpufreq_get_driver_data();
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if (!pd || !pd->independent_clocks)
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cpumask_setall(policy->cpus);
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of_node_put(np);
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return 0;
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out_cooling_unregister:
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cpufreq_cooling_unregister(priv->cdev);
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dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
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out_free_priv:
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kfree(priv);
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out_put_node:
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of_node_put(np);
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out_put_reg_clk:
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clk_put(cpu_clk);
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if (!IS_ERR(cpu_reg))
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regulator_put(cpu_reg);
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return ret;
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}
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static int cpufreq_exit(struct cpufreq_policy *policy)
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{
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struct private_data *priv = policy->driver_data;
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cpufreq_cooling_unregister(priv->cdev);
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dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
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clk_put(policy->clk);
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if (!IS_ERR(priv->cpu_reg))
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regulator_put(priv->cpu_reg);
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kfree(priv);
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return 0;
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}
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static struct cpufreq_driver dt_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = set_target,
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.get = cpufreq_generic_get,
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.init = cpufreq_init,
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.exit = cpufreq_exit,
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.name = "cpufreq-dt",
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.attr = cpufreq_generic_attr,
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};
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static int dt_cpufreq_probe(struct platform_device *pdev)
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{
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struct device *cpu_dev;
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struct regulator *cpu_reg;
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struct clk *cpu_clk;
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int ret;
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/*
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* All per-cluster (CPUs sharing clock/voltages) initialization is done
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* from ->init(). In probe(), we just need to make sure that clk and
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* regulators are available. Else defer probe and retry.
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*
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* FIXME: Is checking this only for CPU0 sufficient ?
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*/
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ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
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if (ret)
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return ret;
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clk_put(cpu_clk);
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if (!IS_ERR(cpu_reg))
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regulator_put(cpu_reg);
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dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
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ret = cpufreq_register_driver(&dt_cpufreq_driver);
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if (ret)
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dev_err(cpu_dev, "failed register driver: %d\n", ret);
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return ret;
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}
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static int dt_cpufreq_remove(struct platform_device *pdev)
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{
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cpufreq_unregister_driver(&dt_cpufreq_driver);
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return 0;
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}
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static struct platform_driver dt_cpufreq_platdrv = {
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.driver = {
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.name = "cpufreq-dt",
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.owner = THIS_MODULE,
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},
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.probe = dt_cpufreq_probe,
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.remove = dt_cpufreq_remove,
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};
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module_platform_driver(dt_cpufreq_platdrv);
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MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
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MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
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MODULE_DESCRIPTION("Generic cpufreq driver");
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MODULE_LICENSE("GPL");
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