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cfa6a88c83
Work around a silicon bug in the ac97 reset functionality of the mpc5200(b). The implementation of the ac97 "cold" reset is flawed. If the sync and output lines are high when reset is asserted the attached ac97 device may go into test mode. Avoid this by reconfiguring the psc to gpio mode and generating the reset manually. From MPC5200B User's Manual: "Some AC97 devices goes to a test mode, if the Sync line is high during the Res line is low (reset phase). To avoid this behavior the Sync line must be also forced to zero during the reset phase. To do that, the pin muxing should switch to GPIO mode and the GPIO control register should be used to control the output lines." Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> |
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| .. | ||
| efika.c | ||
| Kconfig | ||
| lite5200_pm.c | ||
| lite5200_sleep.S | ||
| lite5200.c | ||
| Makefile | ||
| media5200.c | ||
| mpc52xx_common.c | ||
| mpc52xx_gpio.c | ||
| mpc52xx_gpt.c | ||
| mpc52xx_lpbfifo.c | ||
| mpc52xx_pci.c | ||
| mpc52xx_pic.c | ||
| mpc52xx_pm.c | ||
| mpc52xx_sleep.S | ||
| mpc5200_simple.c | ||