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![Huacai Chen](/assets/img/avatar_default.png)
This and the next patch resolve memory corruption problems while CPU hotplug. Without these patches, memory corruption can triggered easily as below: On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http:// code.google.com/p/byte-unixbench/) and a CPU hotplug script like this (hotplug.sh): while true; do echo 0 >/sys/devices/system/cpu/cpu1/online echo 0 >/sys/devices/system/cpu/cpu2/online echo 0 >/sys/devices/system/cpu/cpu3/online sleep 1 echo 1 >/sys/devices/system/cpu/cpu1/online echo 1 >/sys/devices/system/cpu/cpu2/online echo 1 >/sys/devices/system/cpu/cpu3/online sleep 1 done Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault after a few minutes. This patch: Currently, clear_page()/copy_page() are generated by Micro-assembler dynamically. But they are unavailable until uasm_resolve_relocs() has finished because jump labels are illegal before that. Since these functions are shared by every CPU, we only call build_clear_page()/ build_copy_page() only once at boot time. Without this patch, programs will get random memory corruption (segmentation fault, bus error, etc.) while CPU Hotplug (e.g. one CPU is using clear_page() while another is generating it in cpu_cache_init()). For similar reasons we modify build_tlb_refill_handler()'s invocation. V2: 1, Rework the code to make CPU#0 can be online/offline. 2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU need a per-CPU tlb_refill_handler(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Hongbing Hu <huhb@lemote.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: http://patchwork.linux-mips.org/patch/4994/ Acked-by: John Crispin <blogic@openwrt.org>
63 lines
1.7 KiB
C
63 lines
1.7 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2009 Wu Zhangjin <wuzhangjin@gmail.com>
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* Copyright (C) 2009 Philippe Vachon <philippe@cowpig.ca>
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* Copyright (C) 2009 Zhang Le <r0bertz@gentoo.org>
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*
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* reference: /proc/cpuinfo,
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* arch/mips/kernel/cpu-probe.c(cpu_probe_legacy),
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* arch/mips/kernel/proc.c(show_cpuinfo),
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* loongson2f user manual.
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*/
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#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
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#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H
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#define cpu_dcache_line_size() 32
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#define cpu_icache_line_size() 32
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#define cpu_scache_line_size() 32
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#define cpu_has_32fpr 1
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#define cpu_has_3k_cache 0
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#define cpu_has_4k_cache 1
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#define cpu_has_4kex 1
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#define cpu_has_64bits 1
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#define cpu_has_cache_cdex_p 0
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#define cpu_has_cache_cdex_s 0
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#define cpu_has_counter 1
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#define cpu_has_dc_aliases (PAGE_SIZE < 0x4000)
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#define cpu_has_divec 0
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#define cpu_has_dsp 0
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#define cpu_has_dsp2 0
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#define cpu_has_ejtag 0
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#define cpu_has_fpu 1
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#define cpu_has_ic_fills_f_dc 0
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#define cpu_has_inclusive_pcaches 1
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#define cpu_has_llsc 1
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#define cpu_has_mcheck 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips16 0
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#define cpu_has_mips32r1 0
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#define cpu_has_mips32r2 0
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#define cpu_has_mips3d 0
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_prefetch 0
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#define cpu_has_smartmips 0
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#define cpu_has_tlb 1
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#define cpu_has_tx39_cache 0
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#define cpu_has_userlocal 0
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#define cpu_has_vce 0
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#define cpu_has_veic 0
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#define cpu_has_vint 0
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#define cpu_has_vtag_icache 0
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#define cpu_has_watch 1
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#define cpu_has_local_ebase 0
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#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */
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