mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 07:26:46 +07:00
3c3f6ad350
Based on work for the r8a7778 SoC by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
282 lines
6.4 KiB
Plaintext
282 lines
6.4 KiB
Plaintext
/*
|
|
* Device Tree Source for Renesas r8a7779
|
|
*
|
|
* Copyright (C) 2013 Renesas Solutions Corp.
|
|
* Copyright (C) 2013 Simon Horman
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public License
|
|
* version 2. This program is licensed "as is" without any warranty of any
|
|
* kind, whether express or implied.
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
|
/ {
|
|
compatible = "renesas,r8a7779";
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = <0>;
|
|
};
|
|
cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = <1>;
|
|
};
|
|
cpu@2 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = <2>;
|
|
};
|
|
cpu@3 {
|
|
device_type = "cpu";
|
|
compatible = "arm,cortex-a9";
|
|
reg = <3>;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
spi0 = &hspi0;
|
|
spi1 = &hspi1;
|
|
spi2 = &hspi2;
|
|
};
|
|
|
|
gic: interrupt-controller@f0001000 {
|
|
compatible = "arm,cortex-a9-gic";
|
|
#interrupt-cells = <3>;
|
|
interrupt-controller;
|
|
reg = <0xf0001000 0x1000>,
|
|
<0xf0000100 0x100>;
|
|
};
|
|
|
|
gpio0: gpio@ffc40000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc40000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 0 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio1: gpio@ffc41000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc41000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 32 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio2: gpio@ffc42000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc42000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 64 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio3: gpio@ffc43000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc43000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 96 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio4: gpio@ffc44000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc44000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 128 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio5: gpio@ffc45000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc45000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 146 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 160 32>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
gpio6: gpio@ffc46000 {
|
|
compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
|
|
reg = <0xffc46000 0x2c>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 147 IRQ_TYPE_LEVEL_HIGH>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
gpio-ranges = <&pfc 0 192 9>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
};
|
|
|
|
irqpin0: irqpin@fe780010 {
|
|
compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
|
|
#interrupt-cells = <2>;
|
|
status = "disabled";
|
|
interrupt-controller;
|
|
reg = <0xfe78001c 4>,
|
|
<0xfe780010 4>,
|
|
<0xfe780024 4>,
|
|
<0xfe780044 4>,
|
|
<0xfe780064 4>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH
|
|
0 28 IRQ_TYPE_LEVEL_HIGH
|
|
0 29 IRQ_TYPE_LEVEL_HIGH
|
|
0 30 IRQ_TYPE_LEVEL_HIGH>;
|
|
sense-bitfield-width = <2>;
|
|
};
|
|
|
|
i2c0: i2c@ffc70000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "renesas,i2c-r8a7779";
|
|
reg = <0xffc70000 0x1000>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@ffc71000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "renesas,i2c-r8a7779";
|
|
reg = <0xffc71000 0x1000>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c2: i2c@ffc72000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "renesas,i2c-r8a7779";
|
|
reg = <0xffc72000 0x1000>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c3: i2c@ffc73000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "renesas,i2c-r8a7779";
|
|
reg = <0xffc73000 0x1000>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pfc: pfc@fffc0000 {
|
|
compatible = "renesas,pfc-r8a7779";
|
|
reg = <0xfffc0000 0x23c>;
|
|
};
|
|
|
|
thermal@ffc48000 {
|
|
compatible = "renesas,rcar-thermal";
|
|
reg = <0xffc48000 0x38>;
|
|
};
|
|
|
|
sata: sata@fc600000 {
|
|
compatible = "renesas,rcar-sata";
|
|
reg = <0xfc600000 0x2000>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
sdhi0: sd@ffe4c000 {
|
|
compatible = "renesas,sdhi-r8a7779";
|
|
reg = <0xffe4c000 0x100>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhi1: sd@ffe4d000 {
|
|
compatible = "renesas,sdhi-r8a7779";
|
|
reg = <0xffe4d000 0x100>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhi2: sd@ffe4e000 {
|
|
compatible = "renesas,sdhi-r8a7779";
|
|
reg = <0xffe4e000 0x100>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhi3: sd@ffe4f000 {
|
|
compatible = "renesas,sdhi-r8a7779";
|
|
reg = <0xffe4f000 0x100>;
|
|
interrupt-parent = <&gic>;
|
|
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
|
|
cap-sd-highspeed;
|
|
cap-sdio-irq;
|
|
status = "disabled";
|
|
};
|
|
|
|
hspi0: spi@fffc7000 {
|
|
compatible = "renesas,hspi";
|
|
reg = <0xfffc7000 0x18>;
|
|
interrupt-controller = <&gic>;
|
|
interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hspi1: spi@fffc8000 {
|
|
compatible = "renesas,hspi";
|
|
reg = <0xfffc8000 0x18>;
|
|
interrupt-controller = <&gic>;
|
|
interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
|
|
hspi2: spi@fffc6000 {
|
|
compatible = "renesas,hspi";
|
|
reg = <0xfffc6000 0x18>;
|
|
interrupt-controller = <&gic>;
|
|
interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
|
|
status = "disabled";
|
|
};
|
|
};
|