mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-22 11:47:53 +07:00
ad00e080eb
Fix the following warnings from dtc by adding the unit name to memory nodes: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Converted using the following command: perl -p0777i -e 's/memory \{\n\t\treg = \<0x+([0-9a-f])/memory\@$1$\0000000 \{\n\t\treg = <0x$1/m' `find ./arch/arm/boot/dts -name "imx*"` The files below were manually fixed: -imx1-ads.dts -imx1-apf9328.dts -imx6q-pistachio.dts Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
694 lines
16 KiB
Plaintext
694 lines
16 KiB
Plaintext
/*
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* Copyright (C) 2017 NutsBoard.Org
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*
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* Author: Wig Cheng <onlywig@gmail.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "imx6q.dtsi"
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/ {
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model = "NutsBoard i.MX6 Quad Pistachio board";
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compatible = "nutsboard,imx6q-pistachio", "fsl,imx6q";
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chosen {
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stdout-path = &uart4;
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};
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memory@10000000 {
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reg = <0x10000000 0x80000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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wlan_en_reg: regulator-wlan_en {
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compatible = "regulator-fixed";
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regulator-name = "wlan-en-regulator";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio2 24 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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reg_usb_otg_vbus: regulator-usb_vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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vin-supply = <&swbst_reg>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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gpio-key,wakeup;
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linux,code = <KEY_POWER>;
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};
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};
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sound {
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compatible = "fsl,imx-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "audio-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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backlight_lvds: backlight-lvds {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 50000>;
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brightness-levels = <
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0 /*1 2 3 4 5 6*/ 7 8 9
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10 11 12 13 14 15 16 17 18 19
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20 21 22 23 24 25 26 27 28 29
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30 31 32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47 48 49
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50 51 52 53 54 55 56 57 58 59
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60 61 62 63 64 65 66 67 68 69
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70 71 72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87 88 89
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90 91 92 93 94 95 96 97 98 99
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100
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>;
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default-brightness-level = <94>;
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status = "okay";
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};
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panel {
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compatible = "hannstar,hsd100pxn1";
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backlight = <&backlight_lvds>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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status = "okay";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@a {
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compatible = "fsl,sgtl5000";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_sgtl5000>;
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reg = <0x0a>;
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clocks = <&clks IMX6QDL_CLK_CKO>;
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VDDA-supply = <®_1p8v>;
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VDDIO-supply = <®_1p8v>;
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};
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};
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pmic: pfuze100@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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ar1021@4d {
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compatible = "microchip,ar1021-i2c";
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reg = <0x4d>;
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interrupt-parent = <&gpio6>;
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interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /*pcie power*/
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0 /*LCD power*/
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MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x1b0b0 /*backlight power*/
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 /*SD3 CD pin*/
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MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 /*codec power*/
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MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b0b0 /*touch reset*/
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MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b01 /*touch irq*/
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MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0/*backlight pwr*/
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MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x1b0b0 /*gpio 5V_1*/
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MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 /*gpio 5V_2*/
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MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0 /*gpio 5V_3*/
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MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 /*gpio 5V_4*/
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MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 /*AUX_5V_EN*/
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MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 /*AUX_5VB_EN*/
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MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0 /*AUX_3V3_EN*/
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MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x1b0b0 /*I2C expander pwr*/
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>;
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};
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
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MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
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MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
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MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
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>;
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};
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pinctrl_ecspi1: ecspi1grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
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MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
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MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
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MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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/* AR8035 reset */
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MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x130b0
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/* AR8035 interrupt */
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MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b0b1
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
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/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
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/* AR8035 pin strapping: IO voltage: pull up */
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
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/* AR8035 pin strapping: PHYADDR#0: pull down */
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
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/* AR8035 pin strapping: PHYADDR#1: pull down */
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
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/* AR8035 pin strapping: MODE#1: pull up */
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
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/* AR8035 pin strapping: MODE#3: pull up */
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
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/* AR8035 pin strapping: MODE#0: pull down */
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
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MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
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>;
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};
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pinctrl_gpio_keys: gpio_keysgrp {
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fsl,pins = <
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MX6QDL_PAD_SD4_DAT4__GPIO2_IO12 0x1b0b0
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>;
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};
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pinctrl_hdmi_cec: hdmicecgrp {
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fsl,pins = <
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MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x108b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c1_sgtl5000: i2c1-sgtl5000grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 /* sys_mclk */
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MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130b0 /*headphone det*/
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MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x130b0 /*microphone det*/
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>;
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};
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pinctrl_pwm1: pwm1grp {
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fsl,pins = <
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MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
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>;
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};
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pinctrl_uart1: uart1grp {
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|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
|
|
MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
|
|
MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart5: uart5grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x1b0b1
|
|
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x15059 /*BT_EN*/
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
|
|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
|
|
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
|
|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
|
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
|
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
|
|
MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17059
|
|
MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17059
|
|
MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17059
|
|
MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
|
|
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x15059 /*WL_EN_LDO*/
|
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x15059 /*WL_EN*/
|
|
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x15059 /*WL_IRQ*/
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17071
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10071
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17071
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17071
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17071
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17071
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog: wdoggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b00
|
|
>;
|
|
};
|
|
};
|
|
|
|
&ldb {
|
|
status = "okay";
|
|
|
|
lvds-channel@1 {
|
|
fsl,data-mapping = "spwg";
|
|
fsl,data-width = <18>;
|
|
status = "okay";
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
|
|
lvds0_out: endpoint {
|
|
remote-endpoint = <&panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_poweroff {
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
uart-has-rtscts;
|
|
fsl,dte-mode;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart5>;
|
|
fsl,uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
disable-over-current;
|
|
srp-disable;
|
|
hnp-disable;
|
|
adp-disable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usbphy1 {
|
|
fsl,tx-d-cal = <0x5>;
|
|
};
|
|
|
|
&usbphy2 {
|
|
fsl,tx-d-cal = <0x5>;
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
bus-width = <8>;
|
|
keep-power-in-suspend;
|
|
vmmc-supply = <®_3p3v>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
bus-width = <4>;
|
|
vmmc-supply = <&wlan_en_reg>;
|
|
no-1-8-v;
|
|
keep-power-in-suspend;
|
|
non-removable;
|
|
cap-power-off-card;
|
|
status = "okay";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
wlcore: wlcore@2 {
|
|
compatible = "ti,wl1835";
|
|
reg = <2>;
|
|
interrupt-parent = <&gpio5>;
|
|
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
|
|
ref-clock-frequency = <38400000>;
|
|
tcxo-clock-frequency = <26000000>;
|
|
};
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
|
|
no-1-8-v;
|
|
keep-power-in-suspend;
|
|
wakeup-source;
|
|
status = "okay";
|
|
};
|
|
|
|
&sata {
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog1 {
|
|
status = "okay";
|
|
};
|