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ce4e2e4558
There exist chips with up to four mv643xx_eth silicon blocks but only one external SMI (MII management) interface -- the SMI logic of the first block is shared by all the blocks. Handle this by allowing a per-port override of which mv643xx_eth_shared's SMI registers (and spinlock) to use. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
47 lines
1.2 KiB
C
47 lines
1.2 KiB
C
/*
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* MV-643XX ethernet platform device data definition file.
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*/
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#ifndef __LINUX_MV643XX_ETH_H
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#define __LINUX_MV643XX_ETH_H
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#include <linux/mbus.h>
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#define MV643XX_ETH_SHARED_NAME "mv643xx_eth"
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#define MV643XX_ETH_NAME "mv643xx_eth_port"
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#define MV643XX_ETH_SHARED_REGS 0x2000
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#define MV643XX_ETH_SHARED_REGS_SIZE 0x2000
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#define MV643XX_ETH_BAR_4 0x2220
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#define MV643XX_ETH_SIZE_REG_4 0x2224
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#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
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struct mv643xx_eth_shared_platform_data {
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struct mbus_dram_target_info *dram;
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unsigned int t_clk;
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};
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struct mv643xx_eth_platform_data {
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struct platform_device *shared;
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int port_number;
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struct platform_device *shared_smi;
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u16 force_phy_addr; /* force override if phy_addr == 0 */
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u16 phy_addr;
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/* If speed is 0, then speed and duplex are autonegotiated. */
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int speed; /* 0, SPEED_10, SPEED_100, SPEED_1000 */
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int duplex; /* DUPLEX_HALF or DUPLEX_FULL */
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/* non-zero values of the following fields override defaults */
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u32 tx_queue_size;
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u32 rx_queue_size;
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u32 tx_sram_addr;
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u32 tx_sram_size;
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u32 rx_sram_addr;
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u32 rx_sram_size;
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u8 mac_addr[6]; /* mac address if non-zero*/
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};
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#endif /* __LINUX_MV643XX_ETH_H */
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