mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 23:35:03 +07:00
3b1313eb32
Report L1 caches as shared per core; L2 - per cluster. This fixes "perf" that went crazy if shared_cpu_map attribute not reported on sysfs, in form of /sys/devices/system/cpu/cpu*/cache/index*/shared_cpu_list /sys/devices/system/cpu/cpu*/cache/index*/shared_cpu_map Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@intel.com> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
104 lines
2.5 KiB
C
104 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MIPS cacheinfo support
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*/
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#include <linux/cacheinfo.h>
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/* Populates leaf and increments to next leaf */
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#define populate_cache(cache, leaf, c_level, c_type) \
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do { \
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leaf->type = c_type; \
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leaf->level = c_level; \
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leaf->coherency_line_size = c->cache.linesz; \
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leaf->number_of_sets = c->cache.sets; \
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leaf->ways_of_associativity = c->cache.ways; \
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leaf->size = c->cache.linesz * c->cache.sets * \
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c->cache.ways; \
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leaf++; \
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} while (0)
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static int __init_cache_level(unsigned int cpu)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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int levels = 0, leaves = 0;
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/*
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* If Dcache is not set, we assume the cache structures
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* are not properly initialized.
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*/
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if (c->dcache.waysize)
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levels += 1;
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else
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return -ENOENT;
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leaves += (c->icache.waysize) ? 2 : 1;
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if (c->scache.waysize) {
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levels++;
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leaves++;
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}
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if (c->tcache.waysize) {
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levels++;
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leaves++;
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}
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this_cpu_ci->num_levels = levels;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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static void fill_cpumask_siblings(int cpu, cpumask_t *cpu_map)
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{
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int cpu1;
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for_each_possible_cpu(cpu1)
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if (cpus_are_siblings(cpu, cpu1))
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cpumask_set_cpu(cpu1, cpu_map);
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}
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static void fill_cpumask_cluster(int cpu, cpumask_t *cpu_map)
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{
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int cpu1;
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int cluster = cpu_cluster(&cpu_data[cpu]);
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for_each_possible_cpu(cpu1)
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if (cpu_cluster(&cpu_data[cpu1]) == cluster)
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cpumask_set_cpu(cpu1, cpu_map);
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}
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static int __populate_cache_leaves(unsigned int cpu)
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{
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struct cpuinfo_mips *c = ¤t_cpu_data;
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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if (c->icache.waysize) {
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/* L1 caches are per core */
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fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
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populate_cache(dcache, this_leaf, 1, CACHE_TYPE_DATA);
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fill_cpumask_siblings(cpu, &this_leaf->shared_cpu_map);
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populate_cache(icache, this_leaf, 1, CACHE_TYPE_INST);
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} else {
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populate_cache(dcache, this_leaf, 1, CACHE_TYPE_UNIFIED);
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}
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if (c->scache.waysize) {
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/* L2 cache is per cluster */
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fill_cpumask_cluster(cpu, &this_leaf->shared_cpu_map);
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populate_cache(scache, this_leaf, 2, CACHE_TYPE_UNIFIED);
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}
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if (c->tcache.waysize)
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populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);
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this_cpu_ci->cpu_map_populated = true;
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return 0;
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}
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DEFINE_SMP_CALL_CACHE_FUNCTION(init_cache_level)
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DEFINE_SMP_CALL_CACHE_FUNCTION(populate_cache_leaves)
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