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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1c2f05e72a
The Mediatek platform code is not a clock provider, and just needs to call of_clk_init(). Hence it can include <linux/of_clk.h> instead of <linux/clk-provider.h>. Link: https://lore.kernel.org/r/20200505154536.4099-3-geert+renesas@glider.be Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Device Tree support for Mediatek SoCs
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*
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* Copyright (c) 2014 MundoReader S.L.
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* Author: Matthias Brugger <matthias.bgg@gmail.com>
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include <linux/of.h>
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#include <linux/of_clk.h>
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#include <linux/clocksource.h>
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#define GPT6_CON_MT65xx 0x10008060
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#define GPT_ENABLE 0x31
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static void __init mediatek_timer_init(void)
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{
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void __iomem *gpt_base;
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if (of_machine_is_compatible("mediatek,mt6589") ||
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of_machine_is_compatible("mediatek,mt7623") ||
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of_machine_is_compatible("mediatek,mt8135") ||
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of_machine_is_compatible("mediatek,mt8127")) {
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/* turn on GPT6 which ungates arch timer clocks */
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gpt_base = ioremap(GPT6_CON_MT65xx, 0x04);
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/* enable clock and set to free-run */
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writel(GPT_ENABLE, gpt_base);
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iounmap(gpt_base);
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}
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of_clk_init(NULL);
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timer_probe();
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};
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static const char * const mediatek_board_dt_compat[] = {
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"mediatek,mt2701",
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"mediatek,mt6589",
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"mediatek,mt6592",
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"mediatek,mt7623",
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"mediatek,mt7629",
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"mediatek,mt8127",
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"mediatek,mt8135",
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NULL,
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};
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DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)")
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.dt_compat = mediatek_board_dt_compat,
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.init_time = mediatek_timer_init,
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MACHINE_END
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