mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 22:47:45 +07:00
eece8fe5eb
[ Upstream commit f6f1f8e6e3eea25f539105d48166e91f0ab46dd1 ] A dummy zero bit is sent preceding the data during a read transfer by the Microchip 93LC46B eeprom (section 2.7 of[1]). This results in right shift of data during a read. In order to ignore this bit a quirk can be added to send an extra zero bit after the read address. Add a quirk to ignore the zero bit sent before data by adding a zero bit after the read address. [1] - https://www.mouser.com/datasheet/2/268/20001749K-277859.pdf Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Link: https://lore.kernel.org/r/20210105105817.17644-3-a-govindraju@ti.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
30 lines
879 B
C
30 lines
879 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Module: eeprom_93xx46
|
|
* platform description for 93xx46 EEPROMs.
|
|
*/
|
|
#include <linux/gpio/consumer.h>
|
|
|
|
struct eeprom_93xx46_platform_data {
|
|
unsigned char flags;
|
|
#define EE_ADDR8 0x01 /* 8 bit addr. cfg */
|
|
#define EE_ADDR16 0x02 /* 16 bit addr. cfg */
|
|
#define EE_READONLY 0x08 /* forbid writing */
|
|
|
|
unsigned int quirks;
|
|
/* Single word read transfers only; no sequential read. */
|
|
#define EEPROM_93XX46_QUIRK_SINGLE_WORD_READ (1 << 0)
|
|
/* Instructions such as EWEN are (addrlen + 2) in length. */
|
|
#define EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH (1 << 1)
|
|
/* Add extra cycle after address during a read */
|
|
#define EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE BIT(2)
|
|
|
|
/*
|
|
* optional hooks to control additional logic
|
|
* before and after spi transfer.
|
|
*/
|
|
void (*prepare)(void *);
|
|
void (*finish)(void *);
|
|
struct gpio_desc *select;
|
|
};
|