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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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a999933db9
mips_swiotlb_ops differs from the generic swiotlb_dma_ops only in that
it contains a mb() barrier after each operations that maps or syncs
dma memory to the device.
The dma operations are defined to not be memory barriers, but instead
the write* operations to kick the DMA off are supposed to contain them.
For mips this handled by war_io_reorder_wmb(), which evaluates to the
stronger wmb() instead of the pure compiler barrier barrier() for
just those platforms that use swiotlb, so I think we are covered
properly.
[paul.burton@mips.com:
- Include linux/swiotlb.h to fix build failures for configs with
CONFIG_SWIOTLB=y.]
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20038/
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: linux-mips@linux-mips.org
Cc: iommu@lists.linux-foundation.org
Cc: linux-kernel@vger.kernel.org
34 lines
1.1 KiB
Makefile
34 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile for the Linux/MIPS-specific parts of the memory manager.
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#
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obj-y += cache.o extable.o fault.o \
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gup.o init.o mmap.o page.o page-funcs.o \
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pgtable.o tlbex.o tlbex-fault.o tlb-funcs.o
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ifdef CONFIG_CPU_MICROMIPS
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obj-y += uasm-micromips.o
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else
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obj-y += uasm-mips.o
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endif
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obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o
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obj-$(CONFIG_64BIT) += pgtable-64.o
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obj-$(CONFIG_HIGHMEM) += highmem.o
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obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
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obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o
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obj-$(CONFIG_CPU_R4K_CACHE_TLB) += c-r4k.o cex-gen.o tlb-r4k.o
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obj-$(CONFIG_CPU_R3000) += c-r3k.o tlb-r3k.o
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obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o tlb-r8k.o
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obj-$(CONFIG_CPU_SB1) += c-r4k.o cerr-sb1.o cex-sb1.o tlb-r4k.o
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obj-$(CONFIG_CPU_TX39XX) += c-tx39.o tlb-r3k.o
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obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-octeon.o cex-oct.o tlb-r4k.o
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obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
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obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
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obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
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obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o
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obj-$(CONFIG_SCACHE_DEBUGFS) += sc-debugfs.o
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