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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e0c6584df9
sh does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't make any sense to do any work in dma_cache_sync given that it must be a no-op when dma_alloc_attrs returns coherent memory. On the other hand sh uses dma_cache_sync internally in the dma_ops implementation and for the maple bus that does not use the DMA API, so a the old functionality for dma_cache_sync is still provided under the name sh_sync_dma_for_device, and without the redundant dev argument. While at it two of the syncing dma_ops also go the proper _for_device postfix. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
87 lines
2.0 KiB
C
87 lines
2.0 KiB
C
/*
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* DMA mapping support for platforms lacking IOMMUs.
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*
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* Copyright (C) 2009 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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static dma_addr_t nommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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dma_addr_t addr = page_to_phys(page) + offset;
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WARN_ON(size == 0);
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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sh_sync_dma_for_device(page_address(page) + offset, size, dir);
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return addr;
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}
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static int nommu_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *s;
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int i;
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WARN_ON(nents == 0 || sg[0].length == 0);
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for_each_sg(sg, s, nents, i) {
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BUG_ON(!sg_page(s));
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
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sh_sync_dma_for_device(sg_virt(s), s->length, dir);
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s->dma_address = sg_phys(s);
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s->dma_length = s->length;
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}
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return nents;
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}
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#ifdef CONFIG_DMA_NONCOHERENT
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static void nommu_sync_single_for_device(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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sh_sync_dma_for_device(phys_to_virt(addr), size, dir);
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}
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static void nommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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struct scatterlist *s;
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int i;
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for_each_sg(sg, s, nelems, i)
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sh_sync_dma_for_device(sg_virt(s), s->length, dir);
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}
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#endif
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const struct dma_map_ops nommu_dma_ops = {
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.alloc = dma_generic_alloc_coherent,
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.free = dma_generic_free_coherent,
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.map_page = nommu_map_page,
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.map_sg = nommu_map_sg,
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#ifdef CONFIG_DMA_NONCOHERENT
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.sync_single_for_device = nommu_sync_single_for_device,
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.sync_sg_for_device = nommu_sync_sg_for_device,
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#endif
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.is_phys = 1,
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};
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void __init no_iommu_init(void)
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{
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if (dma_ops)
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return;
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dma_ops = &nommu_dma_ops;
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}
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