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3b3b681097
ARM v8.4 extensions add new neon instructions for performing a multiplication of each FP16 element of one vector with the corresponding FP16 element of a second vector, and to add or subtract this without an intermediate rounding to the corresponding FP32 element in a third vector. This patch detects this feature and let the userspace know about it via a HWCAP bit and MRS emulation. Cc: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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.. | ||
auxvec.h | ||
bitsperlong.h | ||
bpf_perf_event.h | ||
byteorder.h | ||
fcntl.h | ||
hwcap.h | ||
Kbuild | ||
kvm.h | ||
param.h | ||
perf_regs.h | ||
posix_types.h | ||
ptrace.h | ||
setup.h | ||
sigcontext.h | ||
siginfo.h | ||
signal.h | ||
stat.h | ||
statfs.h | ||
ucontext.h | ||
unistd.h |