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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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acd26bcf36
Error injection mechanisms need a half ways safe way to inject interrupts as invoking generic_handle_irq() or the actual device interrupt handler directly from e.g. a debugfs write is not guaranteed to be safe. On x86 generic_handle_irq() is unsafe due to the hardware trainwreck which is the base of x86 interrupt delivery and affinity management. Move the irq debugfs injection code into a separate function which can be used by error injection code as well. The implementation prevents at least that state is corrupted, but it cannot close a very tiny race window on x86 which might result in a stale and not serviced device interrupt under very unlikely circumstances. This is explicitly for debugging and testing and not for production use or abuse in random driver code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lkml.kernel.org/r/20200306130623.990928309@linutronix.de
249 lines
6.8 KiB
C
249 lines
6.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/uaccess.h>
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#include "internals.h"
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static struct dentry *irq_dir;
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struct irq_bit_descr {
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unsigned int mask;
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char *name;
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};
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#define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
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static void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
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const struct irq_bit_descr *sd, int size)
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{
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int i;
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for (i = 0; i < size; i++, sd++) {
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if (state & sd->mask)
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seq_printf(m, "%*s%s\n", ind + 12, "", sd->name);
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}
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}
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#ifdef CONFIG_SMP
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static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
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{
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struct irq_data *data = irq_desc_get_irq_data(desc);
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struct cpumask *msk;
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msk = irq_data_get_affinity_mask(data);
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seq_printf(m, "affinity: %*pbl\n", cpumask_pr_args(msk));
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#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
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msk = irq_data_get_effective_affinity_mask(data);
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seq_printf(m, "effectiv: %*pbl\n", cpumask_pr_args(msk));
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#endif
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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msk = desc->pending_mask;
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seq_printf(m, "pending: %*pbl\n", cpumask_pr_args(msk));
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#endif
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}
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#else
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static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
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#endif
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static const struct irq_bit_descr irqchip_flags[] = {
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BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
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BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
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BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
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BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
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BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
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BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
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BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
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BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
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BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
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};
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static void
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irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
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{
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struct irq_chip *chip = data->chip;
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if (!chip) {
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seq_printf(m, "chip: None\n");
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return;
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}
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seq_printf(m, "%*schip: %s\n", ind, "", chip->name);
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seq_printf(m, "%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
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irq_debug_show_bits(m, ind, chip->flags, irqchip_flags,
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ARRAY_SIZE(irqchip_flags));
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}
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static void
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irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
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{
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seq_printf(m, "%*sdomain: %s\n", ind, "",
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data->domain ? data->domain->name : "");
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seq_printf(m, "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
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irq_debug_show_chip(m, data, ind + 1);
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if (data->domain && data->domain->ops && data->domain->ops->debug_show)
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data->domain->ops->debug_show(m, NULL, data, ind + 1);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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if (!data->parent_data)
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return;
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seq_printf(m, "%*sparent:\n", ind + 1, "");
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irq_debug_show_data(m, data->parent_data, ind + 4);
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#endif
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}
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static const struct irq_bit_descr irqdata_states[] = {
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BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
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BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
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BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
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BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
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BIT_MASK_DESCR(IRQD_LEVEL),
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BIT_MASK_DESCR(IRQD_ACTIVATED),
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BIT_MASK_DESCR(IRQD_IRQ_STARTED),
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BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
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BIT_MASK_DESCR(IRQD_IRQ_MASKED),
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BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
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BIT_MASK_DESCR(IRQD_PER_CPU),
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BIT_MASK_DESCR(IRQD_NO_BALANCING),
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BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
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BIT_MASK_DESCR(IRQD_MOVE_PCNTXT),
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BIT_MASK_DESCR(IRQD_AFFINITY_SET),
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BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
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BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
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BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
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BIT_MASK_DESCR(IRQD_CAN_RESERVE),
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BIT_MASK_DESCR(IRQD_MSI_NOMASK_QUIRK),
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BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
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BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
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BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
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};
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static const struct irq_bit_descr irqdesc_states[] = {
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BIT_MASK_DESCR(_IRQ_NOPROBE),
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BIT_MASK_DESCR(_IRQ_NOREQUEST),
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BIT_MASK_DESCR(_IRQ_NOTHREAD),
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BIT_MASK_DESCR(_IRQ_NOAUTOEN),
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BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
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BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
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BIT_MASK_DESCR(_IRQ_IS_POLLED),
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BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
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};
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static const struct irq_bit_descr irqdesc_istates[] = {
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BIT_MASK_DESCR(IRQS_AUTODETECT),
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BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
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BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
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BIT_MASK_DESCR(IRQS_ONESHOT),
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BIT_MASK_DESCR(IRQS_REPLAY),
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BIT_MASK_DESCR(IRQS_WAITING),
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BIT_MASK_DESCR(IRQS_PENDING),
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BIT_MASK_DESCR(IRQS_SUSPENDED),
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BIT_MASK_DESCR(IRQS_NMI),
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};
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static int irq_debug_show(struct seq_file *m, void *p)
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{
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struct irq_desc *desc = m->private;
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struct irq_data *data;
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raw_spin_lock_irq(&desc->lock);
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data = irq_desc_get_irq_data(desc);
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seq_printf(m, "handler: %ps\n", desc->handle_irq);
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seq_printf(m, "device: %s\n", desc->dev_name);
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seq_printf(m, "status: 0x%08x\n", desc->status_use_accessors);
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irq_debug_show_bits(m, 0, desc->status_use_accessors, irqdesc_states,
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ARRAY_SIZE(irqdesc_states));
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seq_printf(m, "istate: 0x%08x\n", desc->istate);
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irq_debug_show_bits(m, 0, desc->istate, irqdesc_istates,
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ARRAY_SIZE(irqdesc_istates));
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seq_printf(m, "ddepth: %u\n", desc->depth);
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seq_printf(m, "wdepth: %u\n", desc->wake_depth);
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seq_printf(m, "dstate: 0x%08x\n", irqd_get(data));
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irq_debug_show_bits(m, 0, irqd_get(data), irqdata_states,
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ARRAY_SIZE(irqdata_states));
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seq_printf(m, "node: %d\n", irq_data_get_node(data));
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irq_debug_show_masks(m, desc);
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irq_debug_show_data(m, data, 0);
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raw_spin_unlock_irq(&desc->lock);
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return 0;
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}
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static int irq_debug_open(struct inode *inode, struct file *file)
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{
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return single_open(file, irq_debug_show, inode->i_private);
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}
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static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
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size_t count, loff_t *ppos)
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{
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struct irq_desc *desc = file_inode(file)->i_private;
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char buf[8] = { 0, };
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size_t size;
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size = min(sizeof(buf) - 1, count);
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if (copy_from_user(buf, user_buf, size))
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return -EFAULT;
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if (!strncmp(buf, "trigger", size)) {
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int err = irq_inject_interrupt(irq_desc_get_irq(desc));
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return err ? err : count;
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}
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return count;
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}
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static const struct file_operations dfs_irq_ops = {
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.open = irq_debug_open,
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.write = irq_debug_write,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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void irq_debugfs_copy_devname(int irq, struct device *dev)
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{
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struct irq_desc *desc = irq_to_desc(irq);
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const char *name = dev_name(dev);
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if (name)
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desc->dev_name = kstrdup(name, GFP_KERNEL);
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}
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void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
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{
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char name [10];
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if (!irq_dir || !desc || desc->debugfs_file)
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return;
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sprintf(name, "%d", irq);
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desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
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&dfs_irq_ops);
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}
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static int __init irq_debugfs_init(void)
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{
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struct dentry *root_dir;
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int irq;
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root_dir = debugfs_create_dir("irq", NULL);
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irq_domain_debugfs_init(root_dir);
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irq_dir = debugfs_create_dir("irqs", root_dir);
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irq_lock_sparse();
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for_each_active_irq(irq)
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irq_add_debugfs_entry(irq, irq_to_desc(irq));
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irq_unlock_sparse();
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return 0;
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}
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__initcall(irq_debugfs_init);
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