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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d16a58f885
Make ppc_save_regs() a bit more useful:
- Set NIP to our caller rather rather than the caller's
caller (which is what we save to LR in the stack frame).
- Set SOFTE to the current irq soft-mask state rather than
uninitialised.
- Zero CFAR rather than leave it uninitialised.
In qemu, injecting a nmi to an idle CPU gives a nicer stack
trace (note NIP, IRQMASK, CFAR).
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00429-ga76e38fd80bf #1277
NIP: c0000000000b6e5c LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: c0000000016a2128 IRQMASK: c00000000173fc80
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 000000011dc870ba 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c0000000000b6e5c] power9_idle_type+0x5c/0x70
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b3c] cpu_startup_entry+0x3c/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Oops: System Reset, sig: 6 [#1]
LE PAGE_SIZE=64K MMU=Hash PREEMPT SMP NR_CPUS=2048 NUMA PowerNV
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.6.0-rc2-00430-gddce91b8712f #1278
NIP: c00000000001d150 LR: c0000000000b6e5c CTR: c000000000b06270
REGS: c00000000173fb08 TRAP: 0100 Not tainted
MSR: 9000000000001033 <SF,HV,ME,IR,DR,RI,LE> CR: 28000224 XER: 00000000
CFAR: 0000000000000000 IRQMASK: 1
GPR00: c0000000000b6e5c c00000000173fc80 c000000001743400 c00000000173fb08
GPR04: 0000000000000000 0000000000000000 0000000000000008 0000000000000001
GPR08: 00000001fea80000 0000000000000000 0000000000000000 ffffffffffffffff
GPR12: c000000000b06270 c000000001930000 00000000300026c0 0000000000000000
GPR16: 0000000000000000 0000000000000000 0000000000000003 c0000000016a2128
GPR20: c0000001ffc97148 0000000000000001 c000000000f289a8 0000000000080000
GPR24: c0000000016e1480 00000000b68db8ce 0000000000000000 0000000000000003
GPR28: c0000000016a2128 c0000001ffc97148 c0000000016a2260 0000000000000003
NIP [c00000000001d150] replay_system_reset+0x30/0xa0
LR [c0000000000b6e5c] power9_idle_type+0x5c/0x70
Call Trace:
[c00000000173fc80] [c0000000000b6e5c] power9_idle_type+0x5c/0x70 (unreliable)
[c00000000173fcb0] [c000000000b062b0] stop_loop+0x40/0x60
[c00000000173fce0] [c000000000b022d8] cpuidle_enter_state+0xa8/0x660
[c00000000173fd60] [c000000000b0292c] cpuidle_enter+0x4c/0x70
[c00000000173fda0] [c00000000017624c] call_cpuidle+0x4c/0x90
[c00000000173fdc0] [c000000000176768] do_idle+0x338/0x460
[c00000000173fe60] [c000000000176b38] cpu_startup_entry+0x38/0x40
[c00000000173fe90] [c0000000000126b4] rest_init+0x124/0x140
[c00000000173fed0] [c0000000010948d4] start_kernel+0x938/0x988
[c00000000173ff90] [c00000000000cdcc] start_here_common+0x1c/0x20
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200403131006.123243-1-npiggin@gmail.com
81 lines
2.1 KiB
ArmAsm
81 lines
2.1 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 1996 Paul Mackerras.
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*
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* NOTE: assert(sizeof(buf) > 23 * sizeof(long))
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*/
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/ptrace.h>
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#include <asm/asm-compat.h>
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/*
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* Grab the register values as they are now.
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* This won't do a particularly good job because we really
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* want our caller's caller's registers, and our caller has
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* already executed its prologue.
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* ToDo: We could reach back into the caller's save area to do
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* a better job of representing the caller's state (note that
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* that will be different for 32-bit and 64-bit, because of the
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* different ABIs, though).
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*/
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_GLOBAL(ppc_save_regs)
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PPC_STL r0,0*SZL(r3)
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#ifdef CONFIG_PPC32
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stmw r2, 2*SZL(r3)
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#else
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PPC_STL r2,2*SZL(r3)
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PPC_STL r3,3*SZL(r3)
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PPC_STL r4,4*SZL(r3)
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PPC_STL r5,5*SZL(r3)
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PPC_STL r6,6*SZL(r3)
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PPC_STL r7,7*SZL(r3)
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PPC_STL r8,8*SZL(r3)
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PPC_STL r9,9*SZL(r3)
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PPC_STL r10,10*SZL(r3)
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PPC_STL r11,11*SZL(r3)
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PPC_STL r12,12*SZL(r3)
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PPC_STL r13,13*SZL(r3)
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PPC_STL r14,14*SZL(r3)
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PPC_STL r15,15*SZL(r3)
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PPC_STL r16,16*SZL(r3)
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PPC_STL r17,17*SZL(r3)
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PPC_STL r18,18*SZL(r3)
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PPC_STL r19,19*SZL(r3)
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PPC_STL r20,20*SZL(r3)
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PPC_STL r21,21*SZL(r3)
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PPC_STL r22,22*SZL(r3)
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PPC_STL r23,23*SZL(r3)
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PPC_STL r24,24*SZL(r3)
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PPC_STL r25,25*SZL(r3)
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PPC_STL r26,26*SZL(r3)
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PPC_STL r27,27*SZL(r3)
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PPC_STL r28,28*SZL(r3)
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PPC_STL r29,29*SZL(r3)
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PPC_STL r30,30*SZL(r3)
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PPC_STL r31,31*SZL(r3)
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lbz r0,PACAIRQSOFTMASK(r13)
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PPC_STL r0,SOFTE-STACK_FRAME_OVERHEAD(r3)
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#endif
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/* go up one stack frame for SP */
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PPC_LL r4,0(r1)
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PPC_STL r4,1*SZL(r3)
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/* get caller's LR */
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PPC_LL r0,LRSAVE(r4)
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PPC_STL r0,_LINK-STACK_FRAME_OVERHEAD(r3)
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mflr r0
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PPC_STL r0,_NIP-STACK_FRAME_OVERHEAD(r3)
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mfmsr r0
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PPC_STL r0,_MSR-STACK_FRAME_OVERHEAD(r3)
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mfctr r0
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PPC_STL r0,_CTR-STACK_FRAME_OVERHEAD(r3)
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mfxer r0
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PPC_STL r0,_XER-STACK_FRAME_OVERHEAD(r3)
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mfcr r0
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PPC_STL r0,_CCR-STACK_FRAME_OVERHEAD(r3)
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li r0,0
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PPC_STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
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PPC_STL r0,ORIG_GPR3-STACK_FRAME_OVERHEAD(r3)
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blr
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