mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 22:58:02 +07:00
832607e79d
This doesn't correct any bugs when probing these instructions but makes MOVW slightly faster and makes everything more symmetric with the Thumb instruction cases. We can also remove the now redundant PROBES_EMULATE_NONE and PROBES_SIMULATE_NOP actions. Signed-off-by: Jon Medhurst <tixy@linaro.org>
233 lines
6.1 KiB
C
233 lines
6.1 KiB
C
/*
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* Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <linux/wait.h>
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#include <linux/uprobes.h>
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#include <linux/module.h>
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#include "../decode.h"
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#include "../decode-arm.h"
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#include "core.h"
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static int uprobes_substitute_pc(unsigned long *pinsn, u32 oregs)
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{
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probes_opcode_t insn = __mem_to_opcode_arm(*pinsn);
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probes_opcode_t temp;
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probes_opcode_t mask;
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int freereg;
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u32 free = 0xffff;
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u32 regs;
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for (regs = oregs; regs; regs >>= 4, insn >>= 4) {
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if ((regs & 0xf) == REG_TYPE_NONE)
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continue;
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free &= ~(1 << (insn & 0xf));
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}
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/* No PC, no problem */
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if (free & (1 << 15))
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return 15;
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if (!free)
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return -1;
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/*
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* fls instead of ffs ensures that for "ldrd r0, r1, [pc]" we would
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* pick LR instead of R1.
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*/
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freereg = free = fls(free) - 1;
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temp = __mem_to_opcode_arm(*pinsn);
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insn = temp;
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regs = oregs;
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mask = 0xf;
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for (; regs; regs >>= 4, mask <<= 4, free <<= 4, temp >>= 4) {
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if ((regs & 0xf) == REG_TYPE_NONE)
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continue;
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if ((temp & 0xf) != 15)
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continue;
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insn &= ~mask;
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insn |= free & mask;
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}
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*pinsn = __opcode_to_mem_arm(insn);
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return freereg;
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}
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static void uprobe_set_pc(struct arch_uprobe *auprobe,
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struct arch_uprobe_task *autask,
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struct pt_regs *regs)
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{
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u32 pcreg = auprobe->pcreg;
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autask->backup = regs->uregs[pcreg];
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regs->uregs[pcreg] = regs->ARM_pc + 8;
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}
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static void uprobe_unset_pc(struct arch_uprobe *auprobe,
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struct arch_uprobe_task *autask,
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struct pt_regs *regs)
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{
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/* PC will be taken care of by common code */
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regs->uregs[auprobe->pcreg] = autask->backup;
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}
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static void uprobe_aluwrite_pc(struct arch_uprobe *auprobe,
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struct arch_uprobe_task *autask,
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struct pt_regs *regs)
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{
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u32 pcreg = auprobe->pcreg;
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alu_write_pc(regs->uregs[pcreg], regs);
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regs->uregs[pcreg] = autask->backup;
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}
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static void uprobe_write_pc(struct arch_uprobe *auprobe,
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struct arch_uprobe_task *autask,
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struct pt_regs *regs)
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{
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u32 pcreg = auprobe->pcreg;
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load_write_pc(regs->uregs[pcreg], regs);
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regs->uregs[pcreg] = autask->backup;
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}
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enum probes_insn
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decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
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const struct decode_header *d)
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{
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struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
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asi);
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struct decode_emulate *decode = (struct decode_emulate *) d;
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u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
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int reg;
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reg = uprobes_substitute_pc(&auprobe->ixol[0], regs);
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if (reg == 15)
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return INSN_GOOD;
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if (reg == -1)
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return INSN_REJECTED;
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auprobe->pcreg = reg;
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auprobe->prehandler = uprobe_set_pc;
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auprobe->posthandler = uprobe_unset_pc;
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return INSN_GOOD;
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}
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enum probes_insn
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decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
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const struct decode_header *d, bool alu)
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{
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struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
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asi);
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enum probes_insn ret = decode_pc_ro(insn, asi, d);
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if (((insn >> 12) & 0xf) == 15)
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auprobe->posthandler = alu ? uprobe_aluwrite_pc
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: uprobe_write_pc;
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return ret;
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}
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enum probes_insn
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decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
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struct arch_probes_insn *asi,
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const struct decode_header *d)
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{
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return decode_wb_pc(insn, asi, d, true);
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}
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enum probes_insn
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decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi,
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const struct decode_header *d)
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{
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return decode_wb_pc(insn, asi, d, false);
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}
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enum probes_insn
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uprobe_decode_ldmstm(probes_opcode_t insn,
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struct arch_probes_insn *asi,
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const struct decode_header *d)
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{
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struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
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asi);
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unsigned reglist = insn & 0xffff;
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int rn = (insn >> 16) & 0xf;
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int lbit = insn & (1 << 20);
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unsigned used = reglist | (1 << rn);
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if (rn == 15)
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return INSN_REJECTED;
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if (!(used & (1 << 15)))
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return INSN_GOOD;
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if (used & (1 << 14))
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return INSN_REJECTED;
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/* Use LR instead of PC */
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insn ^= 0xc000;
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auprobe->pcreg = 14;
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auprobe->ixol[0] = __opcode_to_mem_arm(insn);
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auprobe->prehandler = uprobe_set_pc;
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if (lbit)
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auprobe->posthandler = uprobe_write_pc;
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else
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auprobe->posthandler = uprobe_unset_pc;
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return INSN_GOOD;
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}
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const union decode_action uprobes_probes_actions[] = {
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[PROBES_PRELOAD_IMM] = {.handler = probes_simulate_nop},
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[PROBES_PRELOAD_REG] = {.handler = probes_simulate_nop},
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[PROBES_BRANCH_IMM] = {.handler = simulate_blx1},
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[PROBES_MRS] = {.handler = simulate_mrs},
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[PROBES_BRANCH_REG] = {.handler = simulate_blx2bx},
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[PROBES_CLZ] = {.handler = probes_simulate_nop},
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[PROBES_SATURATING_ARITHMETIC] = {.handler = probes_simulate_nop},
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[PROBES_MUL1] = {.handler = probes_simulate_nop},
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[PROBES_MUL2] = {.handler = probes_simulate_nop},
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[PROBES_SWP] = {.handler = probes_simulate_nop},
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[PROBES_LDRSTRD] = {.decoder = decode_pc_ro},
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[PROBES_LOAD_EXTRA] = {.decoder = decode_pc_ro},
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[PROBES_LOAD] = {.decoder = decode_ldr},
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[PROBES_STORE_EXTRA] = {.decoder = decode_pc_ro},
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[PROBES_STORE] = {.decoder = decode_pc_ro},
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[PROBES_MOV_IP_SP] = {.handler = simulate_mov_ipsp},
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[PROBES_DATA_PROCESSING_REG] = {
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.decoder = decode_rd12rn16rm0rs8_rwflags},
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[PROBES_DATA_PROCESSING_IMM] = {
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.decoder = decode_rd12rn16rm0rs8_rwflags},
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[PROBES_MOV_HALFWORD] = {.handler = probes_simulate_nop},
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[PROBES_SEV] = {.handler = probes_simulate_nop},
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[PROBES_WFE] = {.handler = probes_simulate_nop},
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[PROBES_SATURATE] = {.handler = probes_simulate_nop},
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[PROBES_REV] = {.handler = probes_simulate_nop},
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[PROBES_MMI] = {.handler = probes_simulate_nop},
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[PROBES_PACK] = {.handler = probes_simulate_nop},
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[PROBES_EXTEND] = {.handler = probes_simulate_nop},
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[PROBES_EXTEND_ADD] = {.handler = probes_simulate_nop},
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[PROBES_MUL_ADD_LONG] = {.handler = probes_simulate_nop},
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[PROBES_MUL_ADD] = {.handler = probes_simulate_nop},
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[PROBES_BITFIELD] = {.handler = probes_simulate_nop},
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[PROBES_BRANCH] = {.handler = simulate_bbl},
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[PROBES_LDMSTM] = {.decoder = uprobe_decode_ldmstm}
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};
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