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722202e10b
Recent SoC such as Armada 370/XP came with the possibility to deal with the I/O coherency by hardware. In this case the transaction attribute of the window must be flagged as "Shared transaction". Once this flag is set, then the transactions will be forced to be sent through the coherency block, in other case transaction is driven directly to DRAM. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: Yehuda Yitschak <yehuday@marvell.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/*
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* arch/arm/plat-orion/include/plat/addr-map.h
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*
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* Marvell Orion SoC address map handling.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __PLAT_ADDR_MAP_H
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#define __PLAT_ADDR_MAP_H
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extern struct mbus_dram_target_info orion_mbus_dram_info;
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struct orion_addr_map_cfg {
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const int num_wins; /* Total number of windows */
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const int remappable_wins;
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void __iomem *bridge_virt_base;
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int hw_io_coherency;
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/* If NULL, the default cpu_win_can_remap will be used, using
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the value in remappable_wins */
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int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg,
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const int win);
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/* If NULL, the default win_cfg_base will be used, using the
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value in bridge_virt_base */
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void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg,
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const int win);
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};
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/*
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* Information needed to setup one address mapping.
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*/
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struct orion_addr_map_info {
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const int win;
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const u32 base;
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const u32 size;
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const u8 target;
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const u8 attr;
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const int remap;
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};
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void __init orion_config_wins(struct orion_addr_map_cfg *cfg,
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const struct orion_addr_map_info *info);
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void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg,
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const int win, const u32 base,
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const u32 size, const u8 target,
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const u8 attr, const int remap);
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void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg,
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const void __iomem *ddr_window_cpu_base);
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#endif
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