mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 12:56:49 +07:00
36e9e1eab7
Ingo Molnar reported that with the recent changes of not statically blocking IRQ0_VECTOR..IRQ15_VECTOR's on all the cpu's, broke an AMD platform (with Nvidia chipset) boot when "noapic" boot option is used. On this platform, legacy PIC interrupts are getting delivered to all the cpu's instead of just the boot cpu. Thus not initializing the vector to irq mapping for the legacy irq's resulted in not handling certain interrupts causing boot hang. Fix this by initializing the vector to irq mapping on all the logical cpu's, if the legacy IRQ is handled by the legacy PIC. Reported-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> [ -v2: io-apic-enabled improvement ] Acked-by: Yinghai Lu <yinghai@kernel.org> Cc: Eric W. Biederman <ebiederm@xmission.com> LKML-Reference: <1268692386.3296.43.camel@sbs-t61.sc.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
151 lines
4.1 KiB
C
151 lines
4.1 KiB
C
#ifndef _ASM_X86_HW_IRQ_H
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#define _ASM_X86_HW_IRQ_H
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/*
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* (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
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*
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* moved some of the old arch/i386/kernel/irq.h to here. VY
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*
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* IRQ/IPI changes taken from work by Thomas Radke
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* <tomsoft@informatik.tu-chemnitz.de>
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*
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* hacked by Andi Kleen for x86-64.
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* unified by tglx
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*/
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#include <asm/irq_vectors.h>
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#ifndef __ASSEMBLY__
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#include <linux/percpu.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <asm/atomic.h>
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#include <asm/irq.h>
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#include <asm/sections.h>
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/* Interrupt handlers registered during init_IRQ */
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extern void apic_timer_interrupt(void);
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extern void x86_platform_ipi(void);
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extern void error_interrupt(void);
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extern void perf_pending_interrupt(void);
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extern void spurious_interrupt(void);
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extern void thermal_interrupt(void);
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extern void reschedule_interrupt(void);
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extern void mce_self_interrupt(void);
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extern void invalidate_interrupt(void);
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extern void invalidate_interrupt0(void);
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extern void invalidate_interrupt1(void);
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extern void invalidate_interrupt2(void);
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extern void invalidate_interrupt3(void);
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extern void invalidate_interrupt4(void);
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extern void invalidate_interrupt5(void);
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extern void invalidate_interrupt6(void);
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extern void invalidate_interrupt7(void);
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extern void irq_move_cleanup_interrupt(void);
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extern void reboot_interrupt(void);
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extern void threshold_interrupt(void);
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extern void call_function_interrupt(void);
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extern void call_function_single_interrupt(void);
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/* IOAPIC */
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#define IO_APIC_IRQ(x) (((x) >= NR_IRQS_LEGACY) || ((1<<(x)) & io_apic_irqs))
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extern unsigned long io_apic_irqs;
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extern void init_VISWS_APIC_irqs(void);
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extern void setup_IO_APIC(void);
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extern void disable_IO_APIC(void);
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struct io_apic_irq_attr {
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int ioapic;
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int ioapic_pin;
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int trigger;
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int polarity;
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};
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static inline void set_io_apic_irq_attr(struct io_apic_irq_attr *irq_attr,
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int ioapic, int ioapic_pin,
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int trigger, int polarity)
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{
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irq_attr->ioapic = ioapic;
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irq_attr->ioapic_pin = ioapic_pin;
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irq_attr->trigger = trigger;
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irq_attr->polarity = polarity;
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}
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/*
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* This is performance-critical, we want to do it O(1)
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*
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* Most irqs are mapped 1:1 with pins.
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*/
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struct irq_cfg {
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struct irq_pin_list *irq_2_pin;
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cpumask_var_t domain;
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cpumask_var_t old_domain;
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u8 vector;
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u8 move_in_progress : 1;
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};
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extern struct irq_cfg *irq_cfg(unsigned int);
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extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *);
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extern void send_cleanup_vector(struct irq_cfg *);
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struct irq_desc;
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extern unsigned int set_desc_affinity(struct irq_desc *, const struct cpumask *,
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unsigned int *dest_id);
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extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr);
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extern void setup_ioapic_dest(void);
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extern void enable_IO_APIC(void);
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/* Statistics */
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extern atomic_t irq_err_count;
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extern atomic_t irq_mis_count;
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/* EISA */
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extern void eisa_set_level_irq(unsigned int irq);
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/* SMP */
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extern void smp_apic_timer_interrupt(struct pt_regs *);
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extern void smp_spurious_interrupt(struct pt_regs *);
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extern void smp_x86_platform_ipi(struct pt_regs *);
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extern void smp_error_interrupt(struct pt_regs *);
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#ifdef CONFIG_X86_IO_APIC
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extern asmlinkage void smp_irq_move_cleanup_interrupt(void);
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#endif
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#ifdef CONFIG_SMP
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extern void smp_reschedule_interrupt(struct pt_regs *);
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extern void smp_call_function_interrupt(struct pt_regs *);
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extern void smp_call_function_single_interrupt(struct pt_regs *);
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#ifdef CONFIG_X86_32
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extern void smp_invalidate_interrupt(struct pt_regs *);
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#else
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extern asmlinkage void smp_invalidate_interrupt(struct pt_regs *);
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#endif
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#endif
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extern void (*__initconst interrupt[NR_VECTORS-FIRST_EXTERNAL_VECTOR])(void);
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typedef int vector_irq_t[NR_VECTORS];
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DECLARE_PER_CPU(vector_irq_t, vector_irq);
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extern void setup_vector_irq(int cpu);
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#ifdef CONFIG_X86_IO_APIC
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extern void lock_vector_lock(void);
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extern void unlock_vector_lock(void);
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extern void __setup_vector_irq(int cpu);
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#else
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static inline void lock_vector_lock(void) {}
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static inline void unlock_vector_lock(void) {}
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static inline void __setup_vector_irq(int cpu) {}
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#endif
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#endif /* !ASSEMBLY_ */
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#endif /* _ASM_X86_HW_IRQ_H */
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