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1a59d1b8e0
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
371 lines
11 KiB
C
371 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* ALSA driver for ICEnsemble ICE1712 (Envy24)
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*
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* Lowlevel functions for Hoontech STDSP24
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*
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* Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/mutex.h>
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#include <sound/core.h>
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#include "ice1712.h"
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#include "hoontech.h"
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/* Hoontech-specific setting */
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struct hoontech_spec {
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unsigned char boxbits[4];
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unsigned int config;
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unsigned short boxconfig[4];
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};
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static void snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
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{
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byte |= ICE1712_STDSP24_CLOCK_BIT;
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udelay(100);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
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byte &= ~ICE1712_STDSP24_CLOCK_BIT;
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udelay(100);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
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byte |= ICE1712_STDSP24_CLOCK_BIT;
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udelay(100);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
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}
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static void snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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/* select box */
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ICE1712_STDSP24_0_BOX(spec->boxbits, box);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
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/* prepare for write */
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if (chn == 3)
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ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
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ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
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ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
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ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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udelay(100);
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if (chn == 3) {
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ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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} else {
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switch (chn) {
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case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
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case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
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case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
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}
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
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}
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udelay(100);
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ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
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ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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udelay(100);
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ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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/* select box */
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ICE1712_STDSP24_0_BOX(spec->boxbits, box);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
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ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
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ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
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udelay(100);
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ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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mdelay(10);
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ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static void snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
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{
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struct hoontech_spec *spec = ice->spec;
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mutex_lock(&ice->gpio_mutex);
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ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
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snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
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mutex_unlock(&ice->gpio_mutex);
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}
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static int hoontech_init(struct snd_ice1712 *ice, bool staudio)
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{
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struct hoontech_spec *spec;
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int box, chn;
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ice->num_total_dacs = 8;
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ice->num_total_adcs = 8;
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spec = kzalloc(sizeof(*spec), GFP_KERNEL);
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if (!spec)
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return -ENOMEM;
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ice->spec = spec;
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ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
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ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
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ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
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ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
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ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
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ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
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ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
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ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
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ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
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ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
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ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
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ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
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ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
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ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
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ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
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ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
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ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
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ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
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/* let's go - activate only functions in first box */
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if (staudio)
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spec->config = ICE1712_STDSP24_MUTE;
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else
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spec->config = 0;
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/* ICE1712_STDSP24_MUTE |
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ICE1712_STDSP24_INSEL |
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ICE1712_STDSP24_DAREAR; */
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/* These boxconfigs have caused problems in the past.
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* The code is not optimal, but should now enable a working config to
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* be achieved.
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* ** MIDI IN can only be configured on one box **
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* ICE1712_STDSP24_BOX_MIDI1 needs to be set for that box.
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* Tests on a ADAC2000 box suggest the box config flags do not
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* work as would be expected, and the inputs are crossed.
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* Setting ICE1712_STDSP24_BOX_MIDI1 and ICE1712_STDSP24_BOX_MIDI2
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* on the same box connects MIDI-In to both 401 uarts; both outputs
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* are then active on all boxes.
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* The default config here sets up everything on the first box.
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* Alan Horstmann 5.2.2008
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*/
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spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
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ICE1712_STDSP24_BOX_CHN2 |
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ICE1712_STDSP24_BOX_CHN3 |
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ICE1712_STDSP24_BOX_CHN4 |
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ICE1712_STDSP24_BOX_MIDI1 |
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ICE1712_STDSP24_BOX_MIDI2;
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if (staudio) {
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spec->boxconfig[1] =
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spec->boxconfig[2] =
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spec->boxconfig[3] = spec->boxconfig[0];
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} else {
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spec->boxconfig[1] =
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spec->boxconfig[2] =
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spec->boxconfig[3] = 0;
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}
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snd_ice1712_stdsp24_darear(ice,
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(spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
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snd_ice1712_stdsp24_mute(ice,
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(spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
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snd_ice1712_stdsp24_insel(ice,
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(spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
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for (box = 0; box < 4; box++) {
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if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
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snd_ice1712_stdsp24_midi2(ice, 1);
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for (chn = 0; chn < 4; chn++)
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snd_ice1712_stdsp24_box_channel(ice, box, chn,
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(spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
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if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1)
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snd_ice1712_stdsp24_box_midi(ice, box, 1);
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}
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return 0;
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}
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static int snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
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{
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return hoontech_init(ice, false);
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}
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static int snd_ice1712_staudio_init(struct snd_ice1712 *ice)
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{
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return hoontech_init(ice, true);
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}
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/*
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* AK4524 access
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*/
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/* start callback for STDSP24 with modified hardware */
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static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
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{
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struct snd_ice1712 *ice = ak->private_data[0];
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unsigned char tmp;
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snd_ice1712_save_gpio_status(ice);
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tmp = ICE1712_STDSP24_SERIAL_DATA |
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ICE1712_STDSP24_SERIAL_CLOCK |
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ICE1712_STDSP24_AK4524_CS;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
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ice->gpio.direction | tmp);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
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}
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static int snd_ice1712_value_init(struct snd_ice1712 *ice)
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{
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/* Hoontech STDSP24 with modified hardware */
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static const struct snd_akm4xxx akm_stdsp24_mv = {
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.num_adcs = 2,
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.num_dacs = 2,
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.type = SND_AK4524,
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.ops = {
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.lock = stdsp24_ak4524_lock
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}
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};
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static const struct snd_ak4xxx_private akm_stdsp24_mv_priv = {
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.caddr = 2,
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.cif = 1, /* CIF high */
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.data_mask = ICE1712_STDSP24_SERIAL_DATA,
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.clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
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.cs_mask = ICE1712_STDSP24_AK4524_CS,
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.cs_addr = ICE1712_STDSP24_AK4524_CS,
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.cs_none = 0,
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.add_flags = 0,
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};
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int err;
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struct snd_akm4xxx *ak;
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/* set the analog DACs */
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ice->num_total_dacs = 2;
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/* set the analog ADCs */
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ice->num_total_adcs = 2;
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/* analog section */
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ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
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if (! ak)
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return -ENOMEM;
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ice->akm_codecs = 1;
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err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
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if (err < 0)
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return err;
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/* ak4524 controls */
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return snd_ice1712_akm4xxx_build_controls(ice);
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}
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static int snd_ice1712_ez8_init(struct snd_ice1712 *ice)
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{
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ice->gpio.write_mask = ice->eeprom.gpiomask;
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ice->gpio.direction = ice->eeprom.gpiodir;
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
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snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
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return 0;
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}
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/* entry point */
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struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] = {
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{
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.subvendor = ICE1712_SUBDEVICE_STDSP24,
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.name = "Hoontech SoundTrack Audio DSP24",
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.model = "dsp24",
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.chip_init = snd_ice1712_hoontech_init,
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.mpu401_1_name = "MIDI-1 Hoontech/STA DSP24",
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.mpu401_2_name = "MIDI-2 Hoontech/STA DSP24",
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},
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{
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.subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
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.name = "Hoontech SoundTrack Audio DSP24 Value",
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.model = "dsp24_value",
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.chip_init = snd_ice1712_value_init,
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},
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{
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.subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
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.name = "Hoontech STA DSP24 Media 7.1",
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.model = "dsp24_71",
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.chip_init = snd_ice1712_hoontech_init,
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},
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{
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.subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
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.name = "Event Electronics EZ8",
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.model = "ez8",
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.chip_init = snd_ice1712_ez8_init,
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},
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{
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/* STAudio ADCIII has the same SSID as Hoontech StA DSP24,
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* thus identified only via the explicit model option
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*/
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.subvendor = ICE1712_SUBDEVICE_STAUDIO_ADCIII, /* a dummy id */
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.name = "STAudio ADCIII",
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.model = "staudio",
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.chip_init = snd_ice1712_staudio_init,
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},
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{ } /* terminator */
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};
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