mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 20:45:31 +07:00
02e57b9d7c
In case of SGMII more, for example when a MAC2MAC connection is needed, the port selection bits (inside the MAC configuration registers) have to be programmed according to the link selected. So the patch adds a new DT parameter to pass the port selection and to programmed related PCS and CORE to use it. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
101 lines
4.1 KiB
Plaintext
101 lines
4.1 KiB
Plaintext
* STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
|
|
|
|
Required properties:
|
|
- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
|
|
For backwards compatibility: "st,spear600-gmac" is also supported.
|
|
- reg: Address and length of the register set for the device
|
|
- interrupt-parent: Should be the phandle for the interrupt controller
|
|
that services interrupts for this device
|
|
- interrupts: Should contain the STMMAC interrupts
|
|
- interrupt-names: Should contain the interrupt names "macirq"
|
|
"eth_wake_irq" if this interrupt is supported in the "interrupts"
|
|
property
|
|
- phy-mode: See ethernet.txt file in the same directory.
|
|
- snps,reset-gpio gpio number for phy reset.
|
|
- snps,reset-active-low boolean flag to indicate if phy reset is active low.
|
|
- snps,reset-delays-us is triplet of delays
|
|
The 1st cell is reset pre-delay in micro seconds.
|
|
The 2nd cell is reset pulse in micro seconds.
|
|
The 3rd cell is reset post-delay in micro seconds.
|
|
|
|
Optional properties:
|
|
- resets: Should contain a phandle to the STMMAC reset signal, if any
|
|
- reset-names: Should contain the reset signal name "stmmaceth", if a
|
|
reset phandle is given
|
|
- max-frame-size: See ethernet.txt file in the same directory
|
|
- clocks: If present, the first clock should be the GMAC main clock and
|
|
the second clock should be peripheral's register interface clock. Further
|
|
clocks may be specified in derived bindings.
|
|
- clock-names: One name for each entry in the clocks property, the
|
|
first one should be "stmmaceth" and the second one should be "pclk".
|
|
- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
|
|
available this clock is used for programming the Timestamp Addend Register.
|
|
If not passed then the system clock will be used and this is fine on some
|
|
platforms.
|
|
- tx-fifo-depth: See ethernet.txt file in the same directory
|
|
- rx-fifo-depth: See ethernet.txt file in the same directory
|
|
- snps,pbl Programmable Burst Length
|
|
- snps,aal Address-Aligned Beats
|
|
- snps,fixed-burst Program the DMA to use the fixed burst mode
|
|
- snps,mixed-burst Program the DMA to use the mixed burst mode
|
|
- snps,force_thresh_dma_mode Force DMA to use the threshold mode for
|
|
both tx and rx
|
|
- snps,force_sf_dma_mode Force DMA to use the Store and Forward
|
|
mode for both tx and rx. This flag is
|
|
ignored if force_thresh_dma_mode is set.
|
|
- snps,multicast-filter-bins: Number of multicast filter hash bins
|
|
supported by this device instance
|
|
- snps,perfect-filter-entries: Number of perfect filter entries supported
|
|
by this device instance
|
|
- snps,ps-speed: port selection speed that can be passed to the core when
|
|
PCS is supported. For example, this is used in case of SGMII
|
|
and MAC2MAC connection.
|
|
- AXI BUS Mode parameters: below the list of all the parameters to program the
|
|
AXI register inside the DMA module:
|
|
- snps,lpi_en: enable Low Power Interface
|
|
- snps,xit_frm: unlock on WoL
|
|
- snps,wr_osr_lmt: max write outstanding req. limit
|
|
- snps,rd_osr_lmt: max read outstanding req. limit
|
|
- snps,kbbe: do not cross 1KiB boundary.
|
|
- snps,axi_all: align address
|
|
- snps,blen: this is a vector of supported burst length.
|
|
- snps,fb: fixed-burst
|
|
- snps,mb: mixed-burst
|
|
- snps,rb: rebuild INCRx Burst
|
|
- snps,tso: this enables the TSO feature otherwise it will be managed by
|
|
MAC HW capability register.
|
|
- mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
|
|
|
|
Examples:
|
|
|
|
stmmac_axi_setup: stmmac-axi-config {
|
|
snps,wr_osr_lmt = <0xf>;
|
|
snps,rd_osr_lmt = <0xf>;
|
|
snps,blen = <256 128 64 32 0 0 0>;
|
|
};
|
|
|
|
gmac0: ethernet@e0800000 {
|
|
compatible = "st,spear600-gmac";
|
|
reg = <0xe0800000 0x8000>;
|
|
interrupt-parent = <&vic1>;
|
|
interrupts = <24 23>;
|
|
interrupt-names = "macirq", "eth_wake_irq";
|
|
mac-address = [000000000000]; /* Filled in by U-Boot */
|
|
max-frame-size = <3800>;
|
|
phy-mode = "gmii";
|
|
snps,multicast-filter-bins = <256>;
|
|
snps,perfect-filter-entries = <128>;
|
|
rx-fifo-depth = <16384>;
|
|
tx-fifo-depth = <16384>;
|
|
clocks = <&clock>;
|
|
clock-names = "stmmaceth";
|
|
snps,axi-config = <&stmmac_axi_setup>;
|
|
mdio0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "snps,dwmac-mdio";
|
|
phy1: ethernet-phy@0 {
|
|
};
|
|
};
|
|
};
|