mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-07 12:36:40 +07:00
1e9a1aea7a
In general, the kernel should report temperature readings exactly as reported by the hardware. The cpu / gpu thermal driver works in 5 degree increments,but we ought to do more accurate. The temperature will do linear interpolation between the entries in the table. Test= $md5sum /dev/zero & $while true; do grep "" /sys/class/thermal/thermal_zone[1-2]/temp; sleep .5; done e.g. We can get the result as follows: /sys/class/thermal/thermal_zone1/temp:39994 /sys/class/thermal/thermal_zone2/temp:39086 /sys/class/thermal/thermal_zone1/temp:39994 /sys/class/thermal/thermal_zone2/temp:39540 /sys/class/thermal/thermal_zone1/temp:39540 /sys/class/thermal/thermal_zone2/temp:39540 /sys/class/thermal/thermal_zone1/temp:39540 /sys/class/thermal/thermal_zone2/temp:39994 Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
703 lines
18 KiB
C
703 lines
18 KiB
C
/*
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* Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/thermal.h>
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/**
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* If the temperature over a period of time High,
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* the resulting TSHUT gave CRU module,let it reset the entire chip,
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* or via GPIO give PMIC.
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*/
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enum tshut_mode {
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TSHUT_MODE_CRU = 0,
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TSHUT_MODE_GPIO,
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};
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/**
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* the system Temperature Sensors tshut(tshut) polarity
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* the bit 8 is tshut polarity.
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* 0: low active, 1: high active
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*/
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enum tshut_polarity {
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TSHUT_LOW_ACTIVE = 0,
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TSHUT_HIGH_ACTIVE,
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};
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/**
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* The system has three Temperature Sensors. channel 0 is reserved,
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* channel 1 is for CPU, and channel 2 is for GPU.
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*/
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enum sensor_id {
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SENSOR_CPU = 1,
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SENSOR_GPU,
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};
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struct rockchip_tsadc_chip {
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/* The hardware-controlled tshut property */
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long tshut_temp;
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enum tshut_mode tshut_mode;
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enum tshut_polarity tshut_polarity;
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/* Chip-wide methods */
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void (*initialize)(void __iomem *reg, enum tshut_polarity p);
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void (*irq_ack)(void __iomem *reg);
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void (*control)(void __iomem *reg, bool on);
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/* Per-sensor methods */
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int (*get_temp)(int chn, void __iomem *reg, long *temp);
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void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
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void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
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};
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struct rockchip_thermal_sensor {
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struct rockchip_thermal_data *thermal;
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struct thermal_zone_device *tzd;
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enum sensor_id id;
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};
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#define NUM_SENSORS 2 /* Ignore unused sensor 0 */
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struct rockchip_thermal_data {
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const struct rockchip_tsadc_chip *chip;
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struct platform_device *pdev;
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struct reset_control *reset;
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struct rockchip_thermal_sensor sensors[NUM_SENSORS];
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struct clk *clk;
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struct clk *pclk;
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void __iomem *regs;
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long tshut_temp;
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enum tshut_mode tshut_mode;
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enum tshut_polarity tshut_polarity;
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};
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/* TSADC V2 Sensor info define: */
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#define TSADCV2_AUTO_CON 0x04
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#define TSADCV2_INT_EN 0x08
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#define TSADCV2_INT_PD 0x0c
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#define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
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#define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
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#define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
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#define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
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#define TSADCV2_AUTO_PERIOD 0x68
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#define TSADCV2_AUTO_PERIOD_HT 0x6c
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#define TSADCV2_AUTO_EN BIT(0)
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#define TSADCV2_AUTO_DISABLE ~BIT(0)
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#define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
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#define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
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#define TSADCV2_INT_SRC_EN(chn) BIT(chn)
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#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
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#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
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#define TSADCV2_INT_PD_CLEAR ~BIT(8)
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#define TSADCV2_DATA_MASK 0xfff
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#define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
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#define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
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#define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
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#define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
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struct tsadc_table {
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unsigned long code;
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long temp;
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};
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static const struct tsadc_table v2_code_table[] = {
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{TSADCV2_DATA_MASK, -40000},
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{3800, -40000},
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{3792, -35000},
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{3783, -30000},
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{3774, -25000},
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{3765, -20000},
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{3756, -15000},
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{3747, -10000},
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{3737, -5000},
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{3728, 0},
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{3718, 5000},
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{3708, 10000},
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{3698, 15000},
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{3688, 20000},
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{3678, 25000},
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{3667, 30000},
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{3656, 35000},
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{3645, 40000},
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{3634, 45000},
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{3623, 50000},
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{3611, 55000},
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{3600, 60000},
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{3588, 65000},
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{3575, 70000},
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{3563, 75000},
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{3550, 80000},
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{3537, 85000},
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{3524, 90000},
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{3510, 95000},
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{3496, 100000},
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{3482, 105000},
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{3467, 110000},
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{3452, 115000},
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{3437, 120000},
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{3421, 125000},
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{0, 125000},
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};
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static u32 rk_tsadcv2_temp_to_code(long temp)
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{
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int high, low, mid;
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low = 0;
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high = ARRAY_SIZE(v2_code_table) - 1;
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mid = (high + low) / 2;
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if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
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return 0;
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while (low <= high) {
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if (temp == v2_code_table[mid].temp)
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return v2_code_table[mid].code;
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else if (temp < v2_code_table[mid].temp)
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high = mid - 1;
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else
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low = mid + 1;
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mid = (low + high) / 2;
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}
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return 0;
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}
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static long rk_tsadcv2_code_to_temp(u32 code)
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{
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unsigned int low = 0;
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unsigned int high = ARRAY_SIZE(v2_code_table) - 1;
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unsigned int mid = (low + high) / 2;
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unsigned int num;
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unsigned long denom;
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/* Invalid code, return -EAGAIN */
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if (code > TSADCV2_DATA_MASK)
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return -EAGAIN;
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while (low <= high && mid) {
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if (code >= v2_code_table[mid].code &&
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code < v2_code_table[mid - 1].code)
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break;
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else if (code < v2_code_table[mid].code)
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low = mid + 1;
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else
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high = mid - 1;
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mid = (low + high) / 2;
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}
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/*
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* The 5C granularity provided by the table is too much. Let's
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* assume that the relationship between sensor readings and
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* temperature between 2 table entries is linear and interpolate
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* to produce less granular result.
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*/
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num = v2_code_table[mid].temp - v2_code_table[mid - 1].temp;
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num *= v2_code_table[mid - 1].code - code;
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denom = v2_code_table[mid - 1].code - v2_code_table[mid].code;
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return v2_code_table[mid - 1].temp + (num / denom);
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}
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/**
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* rk_tsadcv2_initialize - initialize TASDC Controller
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* (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
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* every two accessing of TSADC in normal operation.
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* (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
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* every two accessing of TSADC after the temperature is higher
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* than COM_SHUT or COM_INT.
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* (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
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* if the temperature is higher than COMP_INT or COMP_SHUT for
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* "debounce" times, TSADC controller will generate interrupt or TSHUT.
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*/
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static void rk_tsadcv2_initialize(void __iomem *regs,
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enum tshut_polarity tshut_polarity)
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{
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if (tshut_polarity == TSHUT_HIGH_ACTIVE)
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writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
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regs + TSADCV2_AUTO_CON);
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else
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writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
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regs + TSADCV2_AUTO_CON);
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writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
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writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
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regs + TSADCV2_HIGHT_INT_DEBOUNCE);
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writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
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regs + TSADCV2_AUTO_PERIOD_HT);
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writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
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regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
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}
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static void rk_tsadcv2_irq_ack(void __iomem *regs)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_INT_PD);
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writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
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}
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static void rk_tsadcv2_control(void __iomem *regs, bool enable)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_AUTO_CON);
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if (enable)
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val |= TSADCV2_AUTO_EN;
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else
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val &= ~TSADCV2_AUTO_EN;
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writel_relaxed(val, regs + TSADCV2_AUTO_CON);
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}
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static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
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{
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u32 val;
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/* the A/D value of the channel last conversion need some time */
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val = readl_relaxed(regs + TSADCV2_DATA(chn));
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if (val == 0)
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return -EAGAIN;
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*temp = rk_tsadcv2_code_to_temp(val);
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return 0;
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}
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static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
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{
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u32 tshut_value, val;
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tshut_value = rk_tsadcv2_temp_to_code(temp);
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writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
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/* TSHUT will be valid */
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val = readl_relaxed(regs + TSADCV2_AUTO_CON);
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writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
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}
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static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
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enum tshut_mode mode)
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{
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u32 val;
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val = readl_relaxed(regs + TSADCV2_INT_EN);
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if (mode == TSHUT_MODE_GPIO) {
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val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
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val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
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} else {
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val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
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val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
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}
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writel_relaxed(val, regs + TSADCV2_INT_EN);
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}
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static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
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.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
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.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
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.tshut_temp = 95000,
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.initialize = rk_tsadcv2_initialize,
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.irq_ack = rk_tsadcv2_irq_ack,
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.control = rk_tsadcv2_control,
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.get_temp = rk_tsadcv2_get_temp,
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.set_tshut_temp = rk_tsadcv2_tshut_temp,
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.set_tshut_mode = rk_tsadcv2_tshut_mode,
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};
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static const struct of_device_id of_rockchip_thermal_match[] = {
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{
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.compatible = "rockchip,rk3288-tsadc",
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.data = (void *)&rk3288_tsadc_data,
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},
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{ /* end */ },
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};
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MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
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static void
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rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
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{
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struct thermal_zone_device *tzd = sensor->tzd;
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tzd->ops->set_mode(tzd,
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on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
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}
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static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
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{
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struct rockchip_thermal_data *thermal = dev;
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int i;
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dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
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thermal->chip->irq_ack(thermal->regs);
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for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
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thermal_zone_device_update(thermal->sensors[i].tzd);
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return IRQ_HANDLED;
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}
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static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
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{
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struct rockchip_thermal_sensor *sensor = _sensor;
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struct rockchip_thermal_data *thermal = sensor->thermal;
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const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
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int retval;
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retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
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dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
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sensor->id, *out_temp, retval);
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return retval;
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}
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static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
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.get_temp = rockchip_thermal_get_temp,
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};
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static int rockchip_configure_from_dt(struct device *dev,
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struct device_node *np,
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struct rockchip_thermal_data *thermal)
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{
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u32 shut_temp, tshut_mode, tshut_polarity;
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if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
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dev_warn(dev,
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"Missing tshut temp property, using default %ld\n",
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thermal->chip->tshut_temp);
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thermal->tshut_temp = thermal->chip->tshut_temp;
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} else {
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thermal->tshut_temp = shut_temp;
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}
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if (thermal->tshut_temp > INT_MAX) {
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dev_err(dev, "Invalid tshut temperature specified: %ld\n",
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thermal->tshut_temp);
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return -ERANGE;
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}
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if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
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dev_warn(dev,
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"Missing tshut mode property, using default (%s)\n",
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thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
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"gpio" : "cru");
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thermal->tshut_mode = thermal->chip->tshut_mode;
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} else {
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thermal->tshut_mode = tshut_mode;
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}
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if (thermal->tshut_mode > 1) {
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dev_err(dev, "Invalid tshut mode specified: %d\n",
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thermal->tshut_mode);
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return -EINVAL;
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}
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if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
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&tshut_polarity)) {
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dev_warn(dev,
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"Missing tshut-polarity property, using default (%s)\n",
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thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
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"low" : "high");
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thermal->tshut_polarity = thermal->chip->tshut_polarity;
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} else {
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thermal->tshut_polarity = tshut_polarity;
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}
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if (thermal->tshut_polarity > 1) {
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dev_err(dev, "Invalid tshut-polarity specified: %d\n",
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thermal->tshut_polarity);
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return -EINVAL;
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}
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return 0;
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}
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static int
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rockchip_thermal_register_sensor(struct platform_device *pdev,
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struct rockchip_thermal_data *thermal,
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struct rockchip_thermal_sensor *sensor,
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enum sensor_id id)
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{
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const struct rockchip_tsadc_chip *tsadc = thermal->chip;
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int error;
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tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
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tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
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sensor->thermal = thermal;
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sensor->id = id;
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sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
|
|
&rockchip_of_thermal_ops);
|
|
if (IS_ERR(sensor->tzd)) {
|
|
error = PTR_ERR(sensor->tzd);
|
|
dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
|
|
id, error);
|
|
return error;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Reset TSADC Controller, reset all tsadc registers.
|
|
*/
|
|
static void rockchip_thermal_reset_controller(struct reset_control *reset)
|
|
{
|
|
reset_control_assert(reset);
|
|
usleep_range(10, 20);
|
|
reset_control_deassert(reset);
|
|
}
|
|
|
|
static int rockchip_thermal_probe(struct platform_device *pdev)
|
|
{
|
|
struct device_node *np = pdev->dev.of_node;
|
|
struct rockchip_thermal_data *thermal;
|
|
const struct of_device_id *match;
|
|
struct resource *res;
|
|
int irq;
|
|
int i;
|
|
int error;
|
|
|
|
match = of_match_node(of_rockchip_thermal_match, np);
|
|
if (!match)
|
|
return -ENXIO;
|
|
|
|
irq = platform_get_irq(pdev, 0);
|
|
if (irq < 0) {
|
|
dev_err(&pdev->dev, "no irq resource?\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
|
|
GFP_KERNEL);
|
|
if (!thermal)
|
|
return -ENOMEM;
|
|
|
|
thermal->pdev = pdev;
|
|
|
|
thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
|
|
if (!thermal->chip)
|
|
return -EINVAL;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
thermal->regs = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(thermal->regs))
|
|
return PTR_ERR(thermal->regs);
|
|
|
|
thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
|
|
if (IS_ERR(thermal->reset)) {
|
|
error = PTR_ERR(thermal->reset);
|
|
dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
|
|
return error;
|
|
}
|
|
|
|
thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
|
|
if (IS_ERR(thermal->clk)) {
|
|
error = PTR_ERR(thermal->clk);
|
|
dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
|
|
return error;
|
|
}
|
|
|
|
thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
|
|
if (IS_ERR(thermal->pclk)) {
|
|
error = PTR_ERR(thermal->clk);
|
|
dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
|
|
error);
|
|
return error;
|
|
}
|
|
|
|
error = clk_prepare_enable(thermal->clk);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
|
|
error);
|
|
return error;
|
|
}
|
|
|
|
error = clk_prepare_enable(thermal->pclk);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
|
|
goto err_disable_clk;
|
|
}
|
|
|
|
rockchip_thermal_reset_controller(thermal->reset);
|
|
|
|
error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
|
|
if (error) {
|
|
dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
|
|
error);
|
|
goto err_disable_pclk;
|
|
}
|
|
|
|
thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
|
|
|
|
error = rockchip_thermal_register_sensor(pdev, thermal,
|
|
&thermal->sensors[0],
|
|
SENSOR_CPU);
|
|
if (error) {
|
|
dev_err(&pdev->dev,
|
|
"failed to register CPU thermal sensor: %d\n", error);
|
|
goto err_disable_pclk;
|
|
}
|
|
|
|
error = rockchip_thermal_register_sensor(pdev, thermal,
|
|
&thermal->sensors[1],
|
|
SENSOR_GPU);
|
|
if (error) {
|
|
dev_err(&pdev->dev,
|
|
"failed to register GPU thermal sensor: %d\n", error);
|
|
goto err_unregister_cpu_sensor;
|
|
}
|
|
|
|
error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
&rockchip_thermal_alarm_irq_thread,
|
|
IRQF_ONESHOT,
|
|
"rockchip_thermal", thermal);
|
|
if (error) {
|
|
dev_err(&pdev->dev,
|
|
"failed to request tsadc irq: %d\n", error);
|
|
goto err_unregister_gpu_sensor;
|
|
}
|
|
|
|
thermal->chip->control(thermal->regs, true);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
|
|
|
|
platform_set_drvdata(pdev, thermal);
|
|
|
|
return 0;
|
|
|
|
err_unregister_gpu_sensor:
|
|
thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
|
|
err_unregister_cpu_sensor:
|
|
thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
|
|
err_disable_pclk:
|
|
clk_disable_unprepare(thermal->pclk);
|
|
err_disable_clk:
|
|
clk_disable_unprepare(thermal->clk);
|
|
|
|
return error;
|
|
}
|
|
|
|
static int rockchip_thermal_remove(struct platform_device *pdev)
|
|
{
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
|
|
struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
|
|
|
|
rockchip_thermal_toggle_sensor(sensor, false);
|
|
thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
|
|
}
|
|
|
|
thermal->chip->control(thermal->regs, false);
|
|
|
|
clk_disable_unprepare(thermal->pclk);
|
|
clk_disable_unprepare(thermal->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
|
|
|
|
thermal->chip->control(thermal->regs, false);
|
|
|
|
clk_disable(thermal->pclk);
|
|
clk_disable(thermal->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused rockchip_thermal_resume(struct device *dev)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(dev);
|
|
struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
|
|
int i;
|
|
int error;
|
|
|
|
error = clk_enable(thermal->clk);
|
|
if (error)
|
|
return error;
|
|
|
|
error = clk_enable(thermal->pclk);
|
|
if (error)
|
|
return error;
|
|
|
|
rockchip_thermal_reset_controller(thermal->reset);
|
|
|
|
thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
|
|
enum sensor_id id = thermal->sensors[i].id;
|
|
|
|
thermal->chip->set_tshut_mode(id, thermal->regs,
|
|
thermal->tshut_mode);
|
|
thermal->chip->set_tshut_temp(id, thermal->regs,
|
|
thermal->tshut_temp);
|
|
}
|
|
|
|
thermal->chip->control(thermal->regs, true);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
|
|
rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
|
|
rockchip_thermal_suspend, rockchip_thermal_resume);
|
|
|
|
static struct platform_driver rockchip_thermal_driver = {
|
|
.driver = {
|
|
.name = "rockchip-thermal",
|
|
.pm = &rockchip_thermal_pm_ops,
|
|
.of_match_table = of_rockchip_thermal_match,
|
|
},
|
|
.probe = rockchip_thermal_probe,
|
|
.remove = rockchip_thermal_remove,
|
|
};
|
|
|
|
module_platform_driver(rockchip_thermal_driver);
|
|
|
|
MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
|
|
MODULE_AUTHOR("Rockchip, Inc.");
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_ALIAS("platform:rockchip-thermal");
|