Isabel Zhang c134c3caba drm/amd/display: Add initialitions for PLL2 clock source ... [Why] Starting from 14nm, the PLL is built into the PHY and the PLL is mapped to PHY on 1 to 1 basis. In the code, the DP port is mapped to a PLL that was not initialized. This causes DP to HDMI dongle to not light up the display. [How] Initializations added for PLL2 when creating resources. Signed-off-by: Isabel Zhang <isabel.zhang@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-02-11 15:09:18 -05:00
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amdgpu_dm	drm/amd/display: Fix psr static frames calculation	2020-02-11 12:10:41 -05:00
dc	drm/amd/display: Add initialitions for PLL2 clock source	2020-02-11 15:09:18 -05:00
dmub	drm/amd/display: Check hw_init state when determining if DMCUB is initialized	2020-01-22 16:55:28 -05:00
include	drm/amd/display: add Pollock IDs, fix Pollock & Dali clk mgr construct	2020-01-14 10:18:10 -05:00
modules	drm/amd/display: fix spelling mistake link_integiry_check -> link_integrity_check	2020-01-30 17:15:42 -05:00
Kconfig	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards	2019-11-13 15:29:42 -05:00
TODO