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69252ec165
STM32 Timers support generic 3 cells PWM bindings to encode PWM number,
period and polarity as defined in pwm.txt.
Fixes: cd9a99c2f8 ("dt-bindings: pwm: Add STM32 bindings")
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
STMicroelectronics STM32 Timers PWM bindings
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Must be a sub-node of an STM32 Timers device tree node.
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See ../mfd/stm32-timers.txt for details about the parent node.
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Required parameters:
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- compatible: Must be "st,stm32-pwm".
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- pinctrl-names: Set to "default".
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- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
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For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
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- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
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bindings defined in pwm.txt.
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Optional parameters:
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- st,breakinput: One or two <index level filter> to describe break input configurations.
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"index" indicates on which break input (0 or 1) the configuration
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should be applied.
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"level" gives the active level (0=low or 1=high) of the input signal
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for this configuration.
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"filter" gives the filtering value to be applied.
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Example:
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timers@40010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "st,stm32-timers";
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reg = <0x40010000 0x400>;
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clocks = <&rcc 0 160>;
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clock-names = "int";
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pwm {
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compatible = "st,stm32-pwm";
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#pwm-cells = <3>;
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pinctrl-0 = <&pwm1_pins>;
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pinctrl-names = "default";
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st,breakinput = <0 1 5>;
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};
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};
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