linux_dsm_epyc7002/arch/openrisc
Stafford Horne c056718464 openrisc: sleep instead of spin on secondary wait
Currently we do a spin on secondary cpus when waiting to boot.  This
theoretically causes issues with power consumption and does cause issues
with qemu cycle burning (it starves cpu 0 from actually being able to
boot.)

This change puts each secondary cpu to sleep if they have a power
management unit, then signals them to wake via IPI when its time to boot.
If the cpus have no power management unit they will loop as before.

Note: The wakeup IPI requires a special interrupt handler as on secondary
cpu's the interrupt infrastructure is not yet established.  This
interrupt handler is set and reset by updating SPR_EVBAR.

Signed-off-by: Stafford Horne <shorne@gmail.com>
2017-11-03 14:01:14 +09:00
..
boot/dts openrisc: dts: or1ksim: Add stdout-path 2017-10-30 21:37:51 +09:00
configs openrisc: defconfig: Cleanup from old Kconfig options 2017-07-08 04:35:30 +09:00
include openrisc: fix initial preempt state for secondary cpu tasks 2017-11-03 14:01:14 +09:00
kernel openrisc: sleep instead of spin on secondary wait 2017-11-03 14:01:14 +09:00
lib openrisc: initial SMP support 2017-11-03 14:01:13 +09:00
mm openrisc: initial SMP support 2017-11-03 14:01:13 +09:00
Kconfig openrisc: initial SMP support 2017-11-03 14:01:13 +09:00
Makefile openrisc: Makefile: append "-D__linux__" to KBUILD_CFLAGS 2013-11-05 16:14:47 +01:00