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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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c015c62b13
When a host mapping fault happens in a guest TLB1 entry today, we map the translated guest entry into the host's TLB1. This isn't particularly clever when the guest is mapped by normal 4k pages, since these would be a lot better to put into TLB0 instead. This patch adds the required logic to map 4k TLB1 shadow maps into the host's TLB0. Signed-off-by: Alexander Graf <agraf@suse.de>
307 lines
8.0 KiB
C
307 lines
8.0 KiB
C
/*
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* Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu <yu.liu@freescale.com>
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* Scott Wood <scottwood@freescale.com>
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* Ashish Kalra <ashish.kalra@freescale.com>
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* Varun Sethi <varun.sethi@freescale.com>
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*
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* Description:
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* This file is based on arch/powerpc/kvm/44x_tlb.h and
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* arch/powerpc/include/asm/kvm_44x.h by Hollis Blanchard <hollisb@us.ibm.com>,
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* Copyright IBM Corp. 2007-2008
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#ifndef KVM_E500_H
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#define KVM_E500_H
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#include <linux/kvm_host.h>
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#include <asm/mmu-book3e.h>
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#include <asm/tlb.h>
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#define E500_PID_NUM 3
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#define E500_TLB_NUM 2
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#define E500_TLB_VALID 1
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#define E500_TLB_BITMAP 2
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#define E500_TLB_TLB0 (1 << 2)
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struct tlbe_ref {
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pfn_t pfn;
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unsigned int flags; /* E500_TLB_* */
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};
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struct tlbe_priv {
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struct tlbe_ref ref; /* TLB0 only -- TLB1 uses tlb_refs */
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};
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#ifdef CONFIG_KVM_E500V2
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struct vcpu_id_table;
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#endif
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struct kvmppc_e500_tlb_params {
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int entries, ways, sets;
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};
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struct kvmppc_vcpu_e500 {
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struct kvm_vcpu vcpu;
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/* Unmodified copy of the guest's TLB -- shared with host userspace. */
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struct kvm_book3e_206_tlb_entry *gtlb_arch;
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/* Starting entry number in gtlb_arch[] */
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int gtlb_offset[E500_TLB_NUM];
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/* KVM internal information associated with each guest TLB entry */
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struct tlbe_priv *gtlb_priv[E500_TLB_NUM];
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struct kvmppc_e500_tlb_params gtlb_params[E500_TLB_NUM];
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unsigned int gtlb_nv[E500_TLB_NUM];
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/*
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* information associated with each host TLB entry --
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* TLB1 only for now. If/when guest TLB1 entries can be
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* mapped with host TLB0, this will be used for that too.
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*
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* We don't want to use this for guest TLB0 because then we'd
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* have the overhead of doing the translation again even if
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* the entry is still in the guest TLB (e.g. we swapped out
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* and back, and our host TLB entries got evicted).
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*/
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struct tlbe_ref *tlb_refs[E500_TLB_NUM];
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unsigned int host_tlb1_nv;
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u32 svr;
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u32 l1csr0;
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u32 l1csr1;
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u32 hid0;
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u32 hid1;
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u64 mcar;
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struct page **shared_tlb_pages;
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int num_shared_tlb_pages;
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u64 *g2h_tlb1_map;
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unsigned int *h2g_tlb1_rmap;
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/* Minimum and maximum address mapped my TLB1 */
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unsigned long tlb1_min_eaddr;
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unsigned long tlb1_max_eaddr;
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#ifdef CONFIG_KVM_E500V2
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u32 pid[E500_PID_NUM];
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/* vcpu id table */
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struct vcpu_id_table *idt;
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#endif
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};
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static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
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{
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return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);
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}
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/* This geometry is the legacy default -- can be overridden by userspace */
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#define KVM_E500_TLB0_WAY_SIZE 128
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#define KVM_E500_TLB0_WAY_NUM 2
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#define KVM_E500_TLB0_SIZE (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)
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#define KVM_E500_TLB1_SIZE 16
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#define index_of(tlbsel, esel) (((tlbsel) << 16) | ((esel) & 0xFFFF))
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#define tlbsel_of(index) ((index) >> 16)
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#define esel_of(index) ((index) & 0xFFFF)
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#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
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#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
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#define MAS2_ATTRIB_MASK \
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(MAS2_X0 | MAS2_X1)
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#define MAS3_ATTRIB_MASK \
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(MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
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| E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
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int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500,
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ulong value);
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int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu);
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int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu);
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int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, gva_t ea);
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int kvmppc_e500_emul_tlbilx(struct kvm_vcpu *vcpu, int type, gva_t ea);
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int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, gva_t ea);
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int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500);
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void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500);
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void kvmppc_get_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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int kvmppc_set_sregs_e500_tlb(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
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#ifdef CONFIG_KVM_E500V2
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unsigned int kvmppc_e500_get_sid(struct kvmppc_vcpu_e500 *vcpu_e500,
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unsigned int as, unsigned int gid,
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unsigned int pr, int avoid_recursion);
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#endif
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/* TLB helper functions */
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static inline unsigned int
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get_tlb_size(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 >> 7) & 0x1f;
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}
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static inline gva_t get_tlb_eaddr(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return tlbe->mas2 & MAS2_EPN;
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}
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static inline u64 get_tlb_bytes(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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unsigned int pgsize = get_tlb_size(tlbe);
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return 1ULL << 10 << pgsize;
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}
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static inline gva_t get_tlb_end(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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u64 bytes = get_tlb_bytes(tlbe);
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return get_tlb_eaddr(tlbe) + bytes - 1;
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}
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static inline u64 get_tlb_raddr(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return tlbe->mas7_3 & ~0xfffULL;
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}
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static inline unsigned int
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get_tlb_tid(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 >> 16) & 0xff;
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}
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static inline unsigned int
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get_tlb_ts(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 >> 12) & 0x1;
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}
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static inline unsigned int
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get_tlb_v(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 >> 31) & 0x1;
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}
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static inline unsigned int
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get_tlb_iprot(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 >> 30) & 0x1;
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}
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static inline unsigned int
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get_tlb_tsize(const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return (tlbe->mas1 & MAS1_TSIZE_MASK) >> MAS1_TSIZE_SHIFT;
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}
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static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.pid & 0xff;
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}
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static inline unsigned int get_cur_as(struct kvm_vcpu *vcpu)
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{
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return !!(vcpu->arch.shared->msr & (MSR_IS | MSR_DS));
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}
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static inline unsigned int get_cur_pr(struct kvm_vcpu *vcpu)
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{
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return !!(vcpu->arch.shared->msr & MSR_PR);
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}
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static inline unsigned int get_cur_spid(const struct kvm_vcpu *vcpu)
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{
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return (vcpu->arch.shared->mas6 >> 16) & 0xff;
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}
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static inline unsigned int get_cur_sas(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.shared->mas6 & 0x1;
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}
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static inline unsigned int get_tlb_tlbsel(const struct kvm_vcpu *vcpu)
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{
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/*
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* Manual says that tlbsel has 2 bits wide.
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* Since we only have two TLBs, only lower bit is used.
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*/
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return (vcpu->arch.shared->mas0 >> 28) & 0x1;
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}
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static inline unsigned int get_tlb_nv_bit(const struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.shared->mas0 & 0xfff;
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}
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static inline unsigned int get_tlb_esel_bit(const struct kvm_vcpu *vcpu)
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{
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return (vcpu->arch.shared->mas0 >> 16) & 0xfff;
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}
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static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
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const struct kvm_book3e_206_tlb_entry *tlbe)
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{
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gpa_t gpa;
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if (!get_tlb_v(tlbe))
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return 0;
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#ifndef CONFIG_KVM_BOOKE_HV
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/* Does it match current guest AS? */
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/* XXX what about IS != DS? */
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if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS))
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return 0;
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#endif
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gpa = get_tlb_raddr(tlbe);
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if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
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/* Mapping is not for RAM. */
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return 0;
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return 1;
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}
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static inline struct kvm_book3e_206_tlb_entry *get_entry(
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struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, int entry)
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{
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int offset = vcpu_e500->gtlb_offset[tlbsel];
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return &vcpu_e500->gtlb_arch[offset + entry];
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}
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void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
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struct kvm_book3e_206_tlb_entry *gtlbe);
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void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500);
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#ifdef CONFIG_KVM_BOOKE_HV
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#define kvmppc_e500_get_tlb_stid(vcpu, gtlbe) get_tlb_tid(gtlbe)
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#define get_tlbmiss_tid(vcpu) get_cur_pid(vcpu)
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#define get_tlb_sts(gtlbe) (gtlbe->mas1 & MAS1_TS)
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#else
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unsigned int kvmppc_e500_get_tlb_stid(struct kvm_vcpu *vcpu,
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struct kvm_book3e_206_tlb_entry *gtlbe);
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static inline unsigned int get_tlbmiss_tid(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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unsigned int tidseld = (vcpu->arch.shared->mas4 >> 16) & 0xf;
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return vcpu_e500->pid[tidseld];
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}
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/* Force TS=1 for all guest mappings. */
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#define get_tlb_sts(gtlbe) (MAS1_TS)
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#endif /* !BOOKE_HV */
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#endif /* KVM_E500_H */
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