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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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bf9a95f9a6
Rearrange 64K PTE bits to free up bits 3, 4, 5 and 6 in the 64K backed HPTE pages. This along with the earlier patch will entirely free up the four bits from 64K PTE. The bit numbers are big-endian as defined in the ISA3.0 This patch does the following change to 64K PTE backed by 64K HPTE. H_PAGE_F_SECOND (S) which occupied bit 4 moves to the second part of the pte to bit 60. H_PAGE_F_GIX (G,I,X) which occupied bit 5, 6 and 7 also moves to the second part of the pte to bit 61, 62, 63, 64 respectively since bit 7 is now freed up, we move H_PAGE_BUSY (B) from bit 9 to bit 7. The second part of the PTE will hold (H_PAGE_F_SECOND|H_PAGE_F_GIX) at bit 60,61,62,63. NOTE: None of the bits in the secondary PTE were not used by 64k-HPTE backed PTE. Before the patch, the 64K HPTE backed 64k PTE format was as follows 0 1 2 3 4 5 6 7 8 9 10...........................63 : : : : : : : : : : : : v v v v v v v v v v v v ,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-, |x|x|x| |S |G |I |X |x|B| |x|x|................|x|x|x|x| <- primary pte '_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_' | | | | | | | | | | | | |..................| | | | | <- secondary pte '_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_' After the patch, the 64k HPTE backed 64k PTE format is as follows 0 1 2 3 4 5 6 7 8 9 10...........................63 : : : : : : : : : : : : v v v v v v v v v v v v ,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-, |x|x|x| | | | |B |x| | |x|x|................|.|.|.|.| <- primary pte '_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_' | | | | | | | | | | | | |..................|S|G|I|X| <- secondary pte '_'_'_'_'__'__'__'__'_'_'_'_'__________________'_'_'_'_' The above PTE changes is applicable to hugetlbpages aswell. The patch does the following code changes: a) moves the H_PAGE_F_SECOND and H_PAGE_F_GIX to 4k PTE header since it is no more needed b the 64k PTEs. b) abstracts out __real_pte() and __rpte_to_hidx() so the caller need not know the bit location of the slot. c) moves the slot bits to the secondary pte. Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Ram Pai <linuxram@us.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
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| .. | ||
| 8xx_mmu.c | ||
| 40x_mmu.c | ||
| 44x_mmu.c | ||
| copro_fault.c | ||
| dma-noncoherent.c | ||
| dump_hashpagetable.c | ||
| dump_linuxpagetables.c | ||
| fault.c | ||
| fsl_booke_mmu.c | ||
| hash64_4k.c | ||
| hash64_64k.c | ||
| hash_low_32.S | ||
| hash_native_64.c | ||
| hash_utils_64.c | ||
| highmem.c | ||
| hugepage-hash64.c | ||
| hugetlbpage-book3e.c | ||
| hugetlbpage-hash64.c | ||
| hugetlbpage-radix.c | ||
| hugetlbpage.c | ||
| init_32.c | ||
| init_64.c | ||
| init-common.c | ||
| Makefile | ||
| mem.c | ||
| mmap.c | ||
| mmu_context_book3s64.c | ||
| mmu_context_hash32.c | ||
| mmu_context_iommu.c | ||
| mmu_context_nohash.c | ||
| mmu_context.c | ||
| mmu_decl.h | ||
| numa.c | ||
| pgtable_32.c | ||
| pgtable_64.c | ||
| pgtable-book3e.c | ||
| pgtable-book3s64.c | ||
| pgtable-hash64.c | ||
| pgtable-radix.c | ||
| pgtable.c | ||
| ppc_mmu_32.c | ||
| slb_low.S | ||
| slb.c | ||
| slice.c | ||
| subpage-prot.c | ||
| tlb_hash32.c | ||
| tlb_hash64.c | ||
| tlb_low_64e.S | ||
| tlb_nohash_low.S | ||
| tlb_nohash.c | ||
| tlb-radix.c | ||
| vphn.c | ||
| vphn.h | ||