mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
da795ec26e
This patch adds the compatible string in sdhci-of-arasan.c to support sdhci-arasan5.1 version of controller. No documented controller IP version is found in the TRM, so we use ths version of command queueing engine integrated into this controller by arasan to specify our controller. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
241 lines
6.2 KiB
C
241 lines
6.2 KiB
C
/*
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* Arasan Secure Digital Host Controller Interface.
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* Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
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* Copyright (c) 2012 Wind River Systems, Inc.
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* Copyright (C) 2013 Pengutronix e.K.
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* Copyright (C) 2013 Xilinx Inc.
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*
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* Based on sdhci-of-esdhc.c
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*
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* Copyright (c) 2007 Freescale Semiconductor, Inc.
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* Copyright (c) 2009 MontaVista Software, Inc.
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*
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* Authors: Xiaobo Xie <X.Xie@freescale.com>
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include "sdhci-pltfm.h"
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#define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
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#define CLK_CTRL_TIMEOUT_SHIFT 16
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#define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
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#define CLK_CTRL_TIMEOUT_MIN_EXP 13
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/**
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* struct sdhci_arasan_data
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* @clk_ahb: Pointer to the AHB clock
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*/
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struct sdhci_arasan_data {
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struct clk *clk_ahb;
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};
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static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host)
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{
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u32 div;
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unsigned long freq;
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET);
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div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT;
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freq = clk_get_rate(pltfm_host->clk);
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freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div);
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return freq;
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}
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static struct sdhci_ops sdhci_arasan_ops = {
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.set_clock = sdhci_set_clock,
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.get_max_clock = sdhci_pltfm_clk_get_max_clock,
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.get_timeout_clock = sdhci_arasan_get_timeout_clock,
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.set_bus_width = sdhci_set_bus_width,
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.reset = sdhci_reset,
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.set_uhs_signaling = sdhci_set_uhs_signaling,
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};
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static struct sdhci_pltfm_data sdhci_arasan_pdata = {
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.ops = &sdhci_arasan_ops,
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.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
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.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
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SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
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};
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#ifdef CONFIG_PM_SLEEP
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/**
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* sdhci_arasan_suspend - Suspend method for the driver
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* @dev: Address of the device structure
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* Returns 0 on success and error value on error
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*
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* Put the device in a low power state.
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*/
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static int sdhci_arasan_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sdhci_host *host = platform_get_drvdata(pdev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
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int ret;
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ret = sdhci_suspend_host(host);
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if (ret)
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return ret;
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clk_disable(pltfm_host->clk);
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clk_disable(sdhci_arasan->clk_ahb);
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return 0;
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}
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/**
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* sdhci_arasan_resume - Resume method for the driver
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* @dev: Address of the device structure
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* Returns 0 on success and error value on error
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*
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* Resume operation after suspend
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*/
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static int sdhci_arasan_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct sdhci_host *host = platform_get_drvdata(pdev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
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int ret;
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ret = clk_enable(sdhci_arasan->clk_ahb);
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if (ret) {
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dev_err(dev, "Cannot enable AHB clock.\n");
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return ret;
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}
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ret = clk_enable(pltfm_host->clk);
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if (ret) {
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dev_err(dev, "Cannot enable SD clock.\n");
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clk_disable(sdhci_arasan->clk_ahb);
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return ret;
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}
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return sdhci_resume_host(host);
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}
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#endif /* ! CONFIG_PM_SLEEP */
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static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend,
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sdhci_arasan_resume);
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static int sdhci_arasan_probe(struct platform_device *pdev)
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{
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int ret;
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struct clk *clk_xin;
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struct sdhci_host *host;
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struct sdhci_pltfm_host *pltfm_host;
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struct sdhci_arasan_data *sdhci_arasan;
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sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan),
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GFP_KERNEL);
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if (!sdhci_arasan)
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return -ENOMEM;
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sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb");
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if (IS_ERR(sdhci_arasan->clk_ahb)) {
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dev_err(&pdev->dev, "clk_ahb clock not found.\n");
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return PTR_ERR(sdhci_arasan->clk_ahb);
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}
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clk_xin = devm_clk_get(&pdev->dev, "clk_xin");
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if (IS_ERR(clk_xin)) {
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dev_err(&pdev->dev, "clk_xin clock not found.\n");
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return PTR_ERR(clk_xin);
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}
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ret = clk_prepare_enable(sdhci_arasan->clk_ahb);
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if (ret) {
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dev_err(&pdev->dev, "Unable to enable AHB clock.\n");
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return ret;
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}
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ret = clk_prepare_enable(clk_xin);
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if (ret) {
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dev_err(&pdev->dev, "Unable to enable SD clock.\n");
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goto clk_dis_ahb;
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}
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host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0);
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if (IS_ERR(host)) {
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ret = PTR_ERR(host);
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goto clk_disable_all;
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}
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if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
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host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
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host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
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}
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sdhci_get_of_property(pdev);
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pltfm_host = sdhci_priv(host);
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pltfm_host->priv = sdhci_arasan;
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pltfm_host->clk = clk_xin;
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ret = mmc_of_parse(host->mmc);
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if (ret) {
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dev_err(&pdev->dev, "parsing dt failed (%u)\n", ret);
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goto clk_disable_all;
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}
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ret = sdhci_add_host(host);
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if (ret)
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goto err_pltfm_free;
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return 0;
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err_pltfm_free:
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sdhci_pltfm_free(pdev);
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clk_disable_all:
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clk_disable_unprepare(clk_xin);
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clk_dis_ahb:
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clk_disable_unprepare(sdhci_arasan->clk_ahb);
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return ret;
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}
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static int sdhci_arasan_remove(struct platform_device *pdev)
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{
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struct sdhci_host *host = platform_get_drvdata(pdev);
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struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
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struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv;
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clk_disable_unprepare(sdhci_arasan->clk_ahb);
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return sdhci_pltfm_unregister(pdev);
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}
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static const struct of_device_id sdhci_arasan_of_match[] = {
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{ .compatible = "arasan,sdhci-8.9a" },
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{ .compatible = "arasan,sdhci-5.1" },
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{ .compatible = "arasan,sdhci-4.9a" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
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static struct platform_driver sdhci_arasan_driver = {
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.driver = {
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.name = "sdhci-arasan",
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.of_match_table = sdhci_arasan_of_match,
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.pm = &sdhci_arasan_dev_pm_ops,
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},
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.probe = sdhci_arasan_probe,
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.remove = sdhci_arasan_remove,
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};
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module_platform_driver(sdhci_arasan_driver);
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MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
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MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
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MODULE_LICENSE("GPL");
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