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After reset all interrupts in the core interrupt controller has the highest priority P0. If the platform supports Fast IRQs and has more than 1 banks of registers then CPU automatically switch banks of registers when P0 interrupt comes. The problem is that the kernel expects that by default switching of banks is not used by all interrupts. It is necessary to set a default nonzero priority for all available interrupts to avoid undefined behaviour. Signed-off-by: Yuriy Kolerov <yuriy.kolerov@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> |
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boot | ||
configs | ||
include | ||
kernel | ||
lib | ||
mm | ||
oprofile | ||
plat-axs10x | ||
plat-eznps | ||
plat-sim | ||
plat-tb10x | ||
Kbuild | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |