mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 23:40:55 +07:00
8f47cb87eb
Make the following needlessly global code static: - iomap.c: struct iomap_ops[] - memcpy.c: pa_memcpy() Signed-off-by: Adrian Bunk <bunk@kernel.org> Cc: Matthew Wilcox <matthew@wil.cx> Cc: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
487 lines
11 KiB
C
487 lines
11 KiB
C
/*
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* iomap.c - Implement iomap interface for PA-RISC
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* Copyright (c) 2004 Matthew Wilcox
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*/
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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/*
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* The iomap space on 32-bit PA-RISC is intended to look like this:
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* 00000000-7fffffff virtual mapped IO
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* 80000000-8fffffff ISA/EISA port space that can't be virtually mapped
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* 90000000-9fffffff Dino port space
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* a0000000-afffffff Astro port space
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* b0000000-bfffffff PAT port space
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* c0000000-cfffffff non-swapped memory IO
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* f0000000-ffffffff legacy IO memory pointers
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*
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* For the moment, here's what it looks like:
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* 80000000-8fffffff All ISA/EISA port space
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* f0000000-ffffffff legacy IO memory pointers
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*
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* On 64-bit, everything is extended, so:
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* 8000000000000000-8fffffffffffffff All ISA/EISA port space
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* f000000000000000-ffffffffffffffff legacy IO memory pointers
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*/
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/*
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* Technically, this should be 'if (VMALLOC_START < addr < VMALLOC_END),
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* but that's slow and we know it'll be within the first 2GB.
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*/
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#ifdef CONFIG_64BIT
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#define INDIRECT_ADDR(addr) (((unsigned long)(addr) & 1UL<<63) != 0)
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#define ADDR_TO_REGION(addr) (((unsigned long)addr >> 60) & 7)
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#define IOPORT_MAP_BASE (8UL << 60)
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#else
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#define INDIRECT_ADDR(addr) (((unsigned long)(addr) & 1UL<<31) != 0)
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#define ADDR_TO_REGION(addr) (((unsigned long)addr >> 28) & 7)
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#define IOPORT_MAP_BASE (8UL << 28)
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#endif
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struct iomap_ops {
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unsigned int (*read8)(void __iomem *);
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unsigned int (*read16)(void __iomem *);
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unsigned int (*read16be)(void __iomem *);
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unsigned int (*read32)(void __iomem *);
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unsigned int (*read32be)(void __iomem *);
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void (*write8)(u8, void __iomem *);
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void (*write16)(u16, void __iomem *);
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void (*write16be)(u16, void __iomem *);
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void (*write32)(u32, void __iomem *);
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void (*write32be)(u32, void __iomem *);
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void (*read8r)(void __iomem *, void *, unsigned long);
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void (*read16r)(void __iomem *, void *, unsigned long);
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void (*read32r)(void __iomem *, void *, unsigned long);
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void (*write8r)(void __iomem *, const void *, unsigned long);
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void (*write16r)(void __iomem *, const void *, unsigned long);
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void (*write32r)(void __iomem *, const void *, unsigned long);
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};
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/* Generic ioport ops. To be replaced later by specific dino/elroy/wax code */
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#define ADDR2PORT(addr) ((unsigned long __force)(addr) & 0xffffff)
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static unsigned int ioport_read8(void __iomem *addr)
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{
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return inb(ADDR2PORT(addr));
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}
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static unsigned int ioport_read16(void __iomem *addr)
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{
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return inw(ADDR2PORT(addr));
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}
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static unsigned int ioport_read32(void __iomem *addr)
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{
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return inl(ADDR2PORT(addr));
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}
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static void ioport_write8(u8 datum, void __iomem *addr)
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{
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outb(datum, ADDR2PORT(addr));
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}
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static void ioport_write16(u16 datum, void __iomem *addr)
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{
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outw(datum, ADDR2PORT(addr));
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}
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static void ioport_write32(u32 datum, void __iomem *addr)
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{
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outl(datum, ADDR2PORT(addr));
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}
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static void ioport_read8r(void __iomem *addr, void *dst, unsigned long count)
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{
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insb(ADDR2PORT(addr), dst, count);
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}
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static void ioport_read16r(void __iomem *addr, void *dst, unsigned long count)
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{
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insw(ADDR2PORT(addr), dst, count);
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}
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static void ioport_read32r(void __iomem *addr, void *dst, unsigned long count)
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{
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insl(ADDR2PORT(addr), dst, count);
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}
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static void ioport_write8r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsb(ADDR2PORT(addr), s, n);
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}
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static void ioport_write16r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsw(ADDR2PORT(addr), s, n);
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}
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static void ioport_write32r(void __iomem *addr, const void *s, unsigned long n)
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{
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outsl(ADDR2PORT(addr), s, n);
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}
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static const struct iomap_ops ioport_ops = {
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ioport_read8,
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ioport_read16,
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ioport_read16,
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ioport_read32,
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ioport_read32,
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ioport_write8,
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ioport_write16,
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ioport_write16,
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ioport_write32,
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ioport_write32,
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ioport_read8r,
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ioport_read16r,
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ioport_read32r,
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ioport_write8r,
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ioport_write16r,
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ioport_write32r,
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};
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/* Legacy I/O memory ops */
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static unsigned int iomem_read8(void __iomem *addr)
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{
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return readb(addr);
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}
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static unsigned int iomem_read16(void __iomem *addr)
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{
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return readw(addr);
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}
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static unsigned int iomem_read16be(void __iomem *addr)
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{
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return __raw_readw(addr);
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}
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static unsigned int iomem_read32(void __iomem *addr)
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{
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return readl(addr);
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}
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static unsigned int iomem_read32be(void __iomem *addr)
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{
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return __raw_readl(addr);
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}
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static void iomem_write8(u8 datum, void __iomem *addr)
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{
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writeb(datum, addr);
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}
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static void iomem_write16(u16 datum, void __iomem *addr)
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{
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writew(datum, addr);
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}
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static void iomem_write16be(u16 datum, void __iomem *addr)
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{
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__raw_writew(datum, addr);
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}
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static void iomem_write32(u32 datum, void __iomem *addr)
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{
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writel(datum, addr);
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}
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static void iomem_write32be(u32 datum, void __iomem *addr)
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{
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__raw_writel(datum, addr);
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}
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static void iomem_read8r(void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u8 *)dst = __raw_readb(addr);
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dst++;
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}
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}
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static void iomem_read16r(void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u16 *)dst = __raw_readw(addr);
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dst += 2;
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}
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}
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static void iomem_read32r(void __iomem *addr, void *dst, unsigned long count)
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{
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while (count--) {
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*(u32 *)dst = __raw_readl(addr);
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dst += 4;
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}
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}
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static void iomem_write8r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writeb(*(u8 *)s, addr);
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s++;
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}
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}
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static void iomem_write16r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writew(*(u16 *)s, addr);
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s += 2;
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}
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}
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static void iomem_write32r(void __iomem *addr, const void *s, unsigned long n)
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{
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while (n--) {
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__raw_writel(*(u32 *)s, addr);
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s += 4;
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}
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}
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static const struct iomap_ops iomem_ops = {
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iomem_read8,
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iomem_read16,
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iomem_read16be,
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iomem_read32,
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iomem_read32be,
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iomem_write8,
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iomem_write16,
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iomem_write16be,
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iomem_write32,
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iomem_write32be,
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iomem_read8r,
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iomem_read16r,
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iomem_read32r,
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iomem_write8r,
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iomem_write16r,
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iomem_write32r,
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};
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static const struct iomap_ops *iomap_ops[8] = {
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[0] = &ioport_ops,
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[7] = &iomem_ops
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};
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unsigned int ioread8(void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read8(addr);
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return *((u8 *)addr);
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}
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unsigned int ioread16(void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read16(addr);
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return le16_to_cpup((u16 *)addr);
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}
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unsigned int ioread16be(void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read16be(addr);
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return *((u16 *)addr);
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}
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unsigned int ioread32(void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read32(addr);
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return le32_to_cpup((u32 *)addr);
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}
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unsigned int ioread32be(void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr)))
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return iomap_ops[ADDR_TO_REGION(addr)]->read32be(addr);
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return *((u32 *)addr);
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}
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void iowrite8(u8 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write8(datum, addr);
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} else {
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*((u8 *)addr) = datum;
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}
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}
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void iowrite16(u16 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write16(datum, addr);
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} else {
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*((u16 *)addr) = cpu_to_le16(datum);
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}
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}
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void iowrite16be(u16 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write16be(datum, addr);
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} else {
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*((u16 *)addr) = datum;
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}
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}
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void iowrite32(u32 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write32(datum, addr);
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} else {
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*((u32 *)addr) = cpu_to_le32(datum);
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}
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}
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void iowrite32be(u32 datum, void __iomem *addr)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write32be(datum, addr);
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} else {
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*((u32 *)addr) = datum;
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}
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}
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/* Repeating interfaces */
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void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->read8r(addr, dst, count);
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} else {
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while (count--) {
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*(u8 *)dst = *(u8 *)addr;
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dst++;
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}
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}
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}
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void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->read16r(addr, dst, count);
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} else {
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while (count--) {
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*(u16 *)dst = *(u16 *)addr;
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dst += 2;
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}
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}
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}
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void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->read32r(addr, dst, count);
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} else {
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while (count--) {
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*(u32 *)dst = *(u32 *)addr;
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dst += 4;
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}
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}
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}
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void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write8r(addr, src, count);
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} else {
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while (count--) {
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*(u8 *)addr = *(u8 *)src;
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src++;
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}
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}
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}
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void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write16r(addr, src, count);
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} else {
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while (count--) {
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*(u16 *)addr = *(u16 *)src;
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src += 2;
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}
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}
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}
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void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
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{
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if (unlikely(INDIRECT_ADDR(addr))) {
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iomap_ops[ADDR_TO_REGION(addr)]->write32r(addr, src, count);
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} else {
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while (count--) {
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*(u32 *)addr = *(u32 *)src;
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src += 4;
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}
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}
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}
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/* Mapping interfaces */
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void __iomem *ioport_map(unsigned long port, unsigned int nr)
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{
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return (void __iomem *)(IOPORT_MAP_BASE | port);
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}
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void ioport_unmap(void __iomem *addr)
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{
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if (!INDIRECT_ADDR(addr)) {
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iounmap(addr);
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}
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}
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/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
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void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
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{
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resource_size_t start = pci_resource_start(dev, bar);
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resource_size_t len = pci_resource_len(dev, bar);
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unsigned long flags = pci_resource_flags(dev, bar);
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if (!len || !start)
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return NULL;
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if (maxlen && len > maxlen)
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len = maxlen;
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if (flags & IORESOURCE_IO)
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return ioport_map(start, len);
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if (flags & IORESOURCE_MEM) {
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if (flags & IORESOURCE_CACHEABLE)
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return ioremap(start, len);
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return ioremap_nocache(start, len);
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}
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/* What? */
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return NULL;
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}
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void pci_iounmap(struct pci_dev *dev, void __iomem * addr)
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{
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if (!INDIRECT_ADDR(addr)) {
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iounmap(addr);
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}
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}
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EXPORT_SYMBOL(ioread8);
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EXPORT_SYMBOL(ioread16);
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EXPORT_SYMBOL(ioread16be);
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EXPORT_SYMBOL(ioread32);
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EXPORT_SYMBOL(ioread32be);
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EXPORT_SYMBOL(iowrite8);
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EXPORT_SYMBOL(iowrite16);
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EXPORT_SYMBOL(iowrite16be);
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EXPORT_SYMBOL(iowrite32);
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EXPORT_SYMBOL(iowrite32be);
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EXPORT_SYMBOL(ioread8_rep);
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EXPORT_SYMBOL(ioread16_rep);
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EXPORT_SYMBOL(ioread32_rep);
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EXPORT_SYMBOL(iowrite8_rep);
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EXPORT_SYMBOL(iowrite16_rep);
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EXPORT_SYMBOL(iowrite32_rep);
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EXPORT_SYMBOL(ioport_map);
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EXPORT_SYMBOL(ioport_unmap);
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EXPORT_SYMBOL(pci_iomap);
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EXPORT_SYMBOL(pci_iounmap);
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