mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-06 23:06:39 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
440 lines
12 KiB
C
440 lines
12 KiB
C
/*
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* SHPCHPRM Legacy: PHP Resource Manager for Non-ACPI/Legacy platform
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*
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* Copyright (C) 1995,2001 Compaq Computer Corporation
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* Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
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* Copyright (C) 2001 IBM Corp.
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* Copyright (C) 2003-2004 Intel Corporation
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*
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Send feedback to <greg@kroah.com>,<dely.l.sy@intel.com>
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*
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/uaccess.h>
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#ifdef CONFIG_IA64
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#include <asm/iosapic.h>
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#endif
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#include "shpchp.h"
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#include "shpchprm.h"
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#include "shpchprm_legacy.h"
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static void __iomem *shpchp_rom_start;
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static u16 unused_IRQ;
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void shpchprm_cleanup(void)
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{
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if (shpchp_rom_start)
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iounmap(shpchp_rom_start);
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}
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int shpchprm_print_pirt(void)
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{
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return 0;
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}
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int shpchprm_get_physical_slot_number(struct controller *ctrl, u32 *sun, u8 busnum, u8 devnum)
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{
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int offset = devnum - ctrl->slot_device_offset;
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*sun = (u8) (ctrl->first_slot + ctrl->slot_num_inc * offset);
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return 0;
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}
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/* Find the Hot Plug Resource Table in the specified region of memory */
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static void __iomem *detect_HRT_floating_pointer(void __iomem *begin, void __iomem *end)
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{
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void __iomem *fp;
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void __iomem *endp;
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u8 temp1, temp2, temp3, temp4;
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int status = 0;
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endp = (end - sizeof(struct hrt) + 1);
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for (fp = begin; fp <= endp; fp += 16) {
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temp1 = readb(fp + SIG0);
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temp2 = readb(fp + SIG1);
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temp3 = readb(fp + SIG2);
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temp4 = readb(fp + SIG3);
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if (temp1 == '$' && temp2 == 'H' && temp3 == 'R' && temp4 == 'T') {
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status = 1;
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break;
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}
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}
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if (!status)
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fp = NULL;
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dbg("Discovered Hotplug Resource Table at %p\n", fp);
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return fp;
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}
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/*
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* shpchprm_find_available_resources
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*
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* Finds available memory, IO, and IRQ resources for programming
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* devices which may be added to the system
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* this function is for hot plug ADD!
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*
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* returns 0 if success
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*/
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int shpchprm_find_available_resources(struct controller *ctrl)
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{
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u8 populated_slot;
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u8 bridged_slot;
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void __iomem *one_slot;
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struct pci_func *func = NULL;
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int i = 10, index = 0;
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u32 temp_dword, rc;
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ulong temp_ulong;
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struct pci_resource *mem_node;
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struct pci_resource *p_mem_node;
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struct pci_resource *io_node;
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struct pci_resource *bus_node;
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void __iomem *rom_resource_table;
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struct pci_bus lpci_bus, *pci_bus;
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u8 cfgspc_irq, temp;
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memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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rom_resource_table = detect_HRT_floating_pointer(shpchp_rom_start, shpchp_rom_start + 0xffff);
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dbg("rom_resource_table = %p\n", rom_resource_table);
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if (rom_resource_table == NULL)
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return -ENODEV;
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/* Sum all resources and setup resource maps */
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unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
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dbg("unused_IRQ = %x\n", unused_IRQ);
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temp = 0;
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while (unused_IRQ) {
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if (unused_IRQ & 1) {
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shpchp_disk_irq = temp;
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break;
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}
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unused_IRQ = unused_IRQ >> 1;
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temp++;
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}
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dbg("shpchp_disk_irq= %d\n", shpchp_disk_irq);
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unused_IRQ = unused_IRQ >> 1;
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temp++;
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while (unused_IRQ) {
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if (unused_IRQ & 1) {
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shpchp_nic_irq = temp;
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break;
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}
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unused_IRQ = unused_IRQ >> 1;
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temp++;
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}
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dbg("shpchp_nic_irq= %d\n", shpchp_nic_irq);
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unused_IRQ = readl(rom_resource_table + PCIIRQ);
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temp = 0;
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pci_read_config_byte(ctrl->pci_dev, PCI_INTERRUPT_LINE, &cfgspc_irq);
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if (!shpchp_nic_irq) {
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shpchp_nic_irq = cfgspc_irq;
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}
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if (!shpchp_disk_irq) {
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shpchp_disk_irq = cfgspc_irq;
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}
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dbg("shpchp_disk_irq, shpchp_nic_irq= %d, %d\n", shpchp_disk_irq, shpchp_nic_irq);
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one_slot = rom_resource_table + sizeof(struct hrt);
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i = readb(rom_resource_table + NUMBER_OF_ENTRIES);
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dbg("number_of_entries = %d\n", i);
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if (!readb(one_slot + SECONDARY_BUS))
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return (1);
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dbg("dev|IO base|length|MEMbase|length|PM base|length|PB SB MB\n");
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while (i && readb(one_slot + SECONDARY_BUS)) {
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u8 dev_func = readb(one_slot + DEV_FUNC);
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u8 primary_bus = readb(one_slot + PRIMARY_BUS);
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u8 secondary_bus = readb(one_slot + SECONDARY_BUS);
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u8 max_bus = readb(one_slot + MAX_BUS);
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u16 io_base = readw(one_slot + IO_BASE);
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u16 io_length = readw(one_slot + IO_LENGTH);
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u16 mem_base = readw(one_slot + MEM_BASE);
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u16 mem_length = readw(one_slot + MEM_LENGTH);
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u16 pre_mem_base = readw(one_slot + PRE_MEM_BASE);
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u16 pre_mem_length = readw(one_slot + PRE_MEM_LENGTH);
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dbg("%2.2x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x | %4.4x |%2.2x %2.2x %2.2x\n",
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dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
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primary_bus, secondary_bus, max_bus);
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/* If this entry isn't for our controller's bus, ignore it */
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if (primary_bus != ctrl->slot_bus) {
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i--;
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one_slot += sizeof(struct slot_rt);
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continue;
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}
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/* find out if this entry is for an occupied slot */
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temp_dword = 0xFFFFFFFF;
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pci_bus->number = primary_bus;
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pci_bus_read_config_dword(pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
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dbg("temp_D_word = %x\n", temp_dword);
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if (temp_dword != 0xFFFFFFFF) {
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index = 0;
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func = shpchp_slot_find(primary_bus, dev_func >> 3, 0);
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while (func && (func->function != (dev_func & 0x07))) {
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dbg("func = %p b:d:f(%x:%x:%x)\n", func, primary_bus, dev_func >> 3, index);
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func = shpchp_slot_find(primary_bus, dev_func >> 3, index++);
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}
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/* If we can't find a match, skip this table entry */
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if (!func) {
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i--;
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one_slot += sizeof(struct slot_rt);
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continue;
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}
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/* this may not work and shouldn't be used */
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if (secondary_bus != primary_bus)
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bridged_slot = 1;
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else
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bridged_slot = 0;
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populated_slot = 1;
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} else {
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populated_slot = 0;
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bridged_slot = 0;
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}
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dbg("slot populated =%s \n", populated_slot?"yes":"no");
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/* If we've got a valid IO base, use it */
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temp_ulong = io_base + io_length;
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if ((io_base) && (temp_ulong <= 0x10000)) {
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io_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
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if (!io_node)
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return -ENOMEM;
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io_node->base = (ulong)io_base;
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io_node->length = (ulong)io_length;
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dbg("found io_node(base, length) = %x, %x\n", io_node->base, io_node->length);
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if (!populated_slot) {
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io_node->next = ctrl->io_head;
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ctrl->io_head = io_node;
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} else {
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io_node->next = func->io_head;
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func->io_head = io_node;
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}
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}
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/* If we've got a valid memory base, use it */
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temp_ulong = mem_base + mem_length;
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if ((mem_base) && (temp_ulong <= 0x10000)) {
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mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
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if (!mem_node)
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return -ENOMEM;
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mem_node->base = (ulong)mem_base << 16;
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mem_node->length = (ulong)(mem_length << 16);
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dbg("found mem_node(base, length) = %x, %x\n", mem_node->base, mem_node->length);
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if (!populated_slot) {
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mem_node->next = ctrl->mem_head;
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ctrl->mem_head = mem_node;
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} else {
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mem_node->next = func->mem_head;
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func->mem_head = mem_node;
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}
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}
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/*
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* If we've got a valid prefetchable memory base, and
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* the base + length isn't greater than 0xFFFF
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*/
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temp_ulong = pre_mem_base + pre_mem_length;
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if ((pre_mem_base) && (temp_ulong <= 0x10000)) {
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p_mem_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
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if (!p_mem_node)
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return -ENOMEM;
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p_mem_node->base = (ulong)pre_mem_base << 16;
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p_mem_node->length = (ulong)pre_mem_length << 16;
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dbg("found p_mem_node(base, length) = %x, %x\n", p_mem_node->base, p_mem_node->length);
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if (!populated_slot) {
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p_mem_node->next = ctrl->p_mem_head;
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ctrl->p_mem_head = p_mem_node;
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} else {
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p_mem_node->next = func->p_mem_head;
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func->p_mem_head = p_mem_node;
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}
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}
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/*
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* If we've got a valid bus number, use it
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* The second condition is to ignore bus numbers on
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* populated slots that don't have PCI-PCI bridges
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*/
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if (secondary_bus && (secondary_bus != primary_bus)) {
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bus_node = (struct pci_resource *) kmalloc(sizeof(struct pci_resource), GFP_KERNEL);
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if (!bus_node)
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return -ENOMEM;
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bus_node->base = (ulong)secondary_bus;
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bus_node->length = (ulong)(max_bus - secondary_bus + 1);
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dbg("found bus_node(base, length) = %x, %x\n", bus_node->base, bus_node->length);
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if (!populated_slot) {
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bus_node->next = ctrl->bus_head;
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ctrl->bus_head = bus_node;
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} else {
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bus_node->next = func->bus_head;
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func->bus_head = bus_node;
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}
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}
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i--;
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one_slot += sizeof(struct slot_rt);
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}
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/* If all of the following fail, we don't have any resources for hot plug add */
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rc = 1;
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rc &= shpchp_resource_sort_and_combine(&(ctrl->mem_head));
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rc &= shpchp_resource_sort_and_combine(&(ctrl->p_mem_head));
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rc &= shpchp_resource_sort_and_combine(&(ctrl->io_head));
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rc &= shpchp_resource_sort_and_combine(&(ctrl->bus_head));
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return (rc);
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}
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int shpchprm_set_hpp(
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struct controller *ctrl,
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struct pci_func *func,
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u8 card_type)
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{
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u32 rc;
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u8 temp_byte;
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struct pci_bus lpci_bus, *pci_bus;
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unsigned int devfn;
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memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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pci_bus->number = func->bus;
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devfn = PCI_DEVFN(func->device, func->function);
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temp_byte = 0x40; /* hard coded value for LT */
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if (card_type == PCI_HEADER_TYPE_BRIDGE) {
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/* set subordinate Latency Timer */
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rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte);
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if (rc) {
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dbg("%s: set secondary LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus,
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func->device, func->function);
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return rc;
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}
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}
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/* set base Latency Timer */
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rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte);
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if (rc) {
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dbg("%s: set LT error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
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return rc;
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}
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/* set Cache Line size */
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temp_byte = 0x08; /* hard coded value for CLS */
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rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte);
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if (rc) {
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dbg("%s: set CLS error. b:d:f(%02x:%02x:%02x)\n", __FUNCTION__, func->bus, func->device, func->function);
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}
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/* set enable_perr */
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/* set enable_serr */
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return rc;
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}
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void shpchprm_enable_card(
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struct controller *ctrl,
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struct pci_func *func,
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u8 card_type)
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{
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u16 command, bcommand;
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struct pci_bus lpci_bus, *pci_bus;
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unsigned int devfn;
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int rc;
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memcpy(&lpci_bus, ctrl->pci_bus, sizeof(lpci_bus));
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pci_bus = &lpci_bus;
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pci_bus->number = func->bus;
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devfn = PCI_DEVFN(func->device, func->function);
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rc = pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &command);
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command |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR
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| PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
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| PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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rc = pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
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if (card_type == PCI_HEADER_TYPE_BRIDGE) {
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rc = pci_bus_read_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, &bcommand);
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bcommand |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR
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| PCI_BRIDGE_CTL_NO_ISA;
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rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, bcommand);
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}
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}
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static int legacy_shpchprm_init_pci(void)
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{
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shpchp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
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if (!shpchp_rom_start) {
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err("Could not ioremap memory region for ROM\n");
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return -EIO;
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}
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return 0;
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}
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int shpchprm_init(enum php_ctlr_type ctrl_type)
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{
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int retval;
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switch (ctrl_type) {
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case PCI:
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retval = legacy_shpchprm_init_pci();
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break;
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default:
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retval = -ENODEV;
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break;
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}
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return retval;
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}
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