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92915f7120
These modules and header contain the Linux OS network interface code and core interrupt and network send/receive handlers. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
319 lines
9.5 KiB
C
319 lines
9.5 KiB
C
/*******************************************************************************
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Intel 82599 Virtual Function driver
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Copyright(c) 1999 - 2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _IXGBEVF_H_
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#define _IXGBEVF_H_
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#include <linux/types.h>
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#include <linux/timer.h>
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#include <linux/io.h>
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#include <linux/netdevice.h>
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#include "vf.h"
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/* wrapper around a pointer to a socket buffer,
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* so a DMA handle can be stored along with the buffer */
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struct ixgbevf_tx_buffer {
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struct sk_buff *skb;
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dma_addr_t dma;
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unsigned long time_stamp;
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u16 length;
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u16 next_to_watch;
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u16 mapped_as_page;
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};
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struct ixgbevf_rx_buffer {
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struct sk_buff *skb;
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dma_addr_t dma;
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struct page *page;
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dma_addr_t page_dma;
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unsigned int page_offset;
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};
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struct ixgbevf_ring {
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struct ixgbevf_adapter *adapter; /* backlink */
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void *desc; /* descriptor ring memory */
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dma_addr_t dma; /* phys. address of descriptor ring */
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unsigned int size; /* length in bytes */
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unsigned int count; /* amount of descriptors */
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unsigned int next_to_use;
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unsigned int next_to_clean;
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int queue_index; /* needed for multiqueue queue management */
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union {
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struct ixgbevf_tx_buffer *tx_buffer_info;
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struct ixgbevf_rx_buffer *rx_buffer_info;
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};
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u16 head;
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u16 tail;
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unsigned int total_bytes;
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unsigned int total_packets;
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u16 reg_idx; /* holds the special value that gets the hardware register
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* offset associated with this ring, which is different
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* for DCB and RSS modes */
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#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
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/* cpu for tx queue */
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int cpu;
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#endif
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u64 v_idx; /* maps directly to the index for this ring in the hardware
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* vector array, can also be used for finding the bit in EICR
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* and friends that represents the vector for this ring */
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u16 work_limit; /* max work per interrupt */
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u16 rx_buf_len;
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};
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enum ixgbevf_ring_f_enum {
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RING_F_NONE = 0,
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RING_F_ARRAY_SIZE /* must be last in enum set */
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};
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struct ixgbevf_ring_feature {
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int indices;
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int mask;
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};
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/* How many Rx Buffers do we bundle into one write to the hardware ? */
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#define IXGBEVF_RX_BUFFER_WRITE 16 /* Must be power of 2 */
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#define MAX_RX_QUEUES 1
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#define MAX_TX_QUEUES 1
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#define IXGBEVF_DEFAULT_TXD 1024
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#define IXGBEVF_DEFAULT_RXD 512
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#define IXGBEVF_MAX_TXD 4096
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#define IXGBEVF_MIN_TXD 64
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#define IXGBEVF_MAX_RXD 4096
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#define IXGBEVF_MIN_RXD 64
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/* Supported Rx Buffer Sizes */
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#define IXGBEVF_RXBUFFER_64 64 /* Used for packet split */
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#define IXGBEVF_RXBUFFER_128 128 /* Used for packet split */
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#define IXGBEVF_RXBUFFER_256 256 /* Used for packet split */
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#define IXGBEVF_RXBUFFER_2048 2048
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#define IXGBEVF_MAX_RXBUFFER 16384 /* largest size for single descriptor */
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#define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
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#define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
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#define IXGBE_TX_FLAGS_CSUM (u32)(1)
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#define IXGBE_TX_FLAGS_VLAN (u32)(1 << 1)
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#define IXGBE_TX_FLAGS_TSO (u32)(1 << 2)
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#define IXGBE_TX_FLAGS_IPV4 (u32)(1 << 3)
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#define IXGBE_TX_FLAGS_FCOE (u32)(1 << 4)
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#define IXGBE_TX_FLAGS_FSO (u32)(1 << 5)
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#define IXGBE_TX_FLAGS_VLAN_MASK 0xffff0000
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#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
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#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
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/* MAX_MSIX_Q_VECTORS of these are allocated,
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* but we only use one per queue-specific vector.
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*/
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struct ixgbevf_q_vector {
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struct ixgbevf_adapter *adapter;
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struct napi_struct napi;
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DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
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DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
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u8 rxr_count; /* Rx ring count assigned to this vector */
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u8 txr_count; /* Tx ring count assigned to this vector */
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u8 tx_itr;
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u8 rx_itr;
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u32 eitr;
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int v_idx; /* vector index in list */
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};
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/* Helper macros to switch between ints/sec and what the register uses.
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* And yes, it's the same math going both ways. The lowest value
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* supported by all of the ixgbe hardware is 8.
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*/
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#define EITR_INTS_PER_SEC_TO_REG(_eitr) \
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((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
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#define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
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#define IXGBE_DESC_UNUSED(R) \
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((((R)->next_to_clean > (R)->next_to_use) ? 0 : (R)->count) + \
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(R)->next_to_clean - (R)->next_to_use - 1)
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#define IXGBE_RX_DESC_ADV(R, i) \
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(&(((union ixgbe_adv_rx_desc *)((R).desc))[i]))
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#define IXGBE_TX_DESC_ADV(R, i) \
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(&(((union ixgbe_adv_tx_desc *)((R).desc))[i]))
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#define IXGBE_TX_CTXTDESC_ADV(R, i) \
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(&(((struct ixgbe_adv_tx_context_desc *)((R).desc))[i]))
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#define IXGBE_MAX_JUMBO_FRAME_SIZE 16128
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#define OTHER_VECTOR 1
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#define NON_Q_VECTORS (OTHER_VECTOR)
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#define MAX_MSIX_Q_VECTORS 2
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#define MAX_MSIX_COUNT 2
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#define MIN_MSIX_Q_VECTORS 2
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#define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
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/* board specific private data structure */
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struct ixgbevf_adapter {
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struct timer_list watchdog_timer;
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#ifdef NETIF_F_HW_VLAN_TX
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struct vlan_group *vlgrp;
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#endif
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u16 bd_number;
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struct work_struct reset_task;
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struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
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char name[MAX_MSIX_COUNT][IFNAMSIZ + 9];
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/* Interrupt Throttle Rate */
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u32 itr_setting;
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u16 eitr_low;
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u16 eitr_high;
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/* TX */
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struct ixgbevf_ring *tx_ring; /* One per active queue */
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int num_tx_queues;
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u64 restart_queue;
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u64 hw_csum_tx_good;
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u64 lsc_int;
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u64 hw_tso_ctxt;
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u64 hw_tso6_ctxt;
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u32 tx_timeout_count;
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bool detect_tx_hung;
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/* RX */
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struct ixgbevf_ring *rx_ring; /* One per active queue */
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int num_rx_queues;
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int num_rx_pools; /* == num_rx_queues in 82598 */
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int num_rx_queues_per_pool; /* 1 if 82598, can be many if 82599 */
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u64 hw_csum_rx_error;
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u64 hw_rx_no_dma_resources;
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u64 hw_csum_rx_good;
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u64 non_eop_descs;
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int num_msix_vectors;
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int max_msix_q_vectors; /* true count of q_vectors for device */
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struct ixgbevf_ring_feature ring_feature[RING_F_ARRAY_SIZE];
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struct msix_entry *msix_entries;
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u64 rx_hdr_split;
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u32 alloc_rx_page_failed;
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u32 alloc_rx_buff_failed;
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/* Some features need tri-state capability,
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* thus the additional *_CAPABLE flags.
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*/
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u32 flags;
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#define IXGBE_FLAG_RX_CSUM_ENABLED (u32)(1)
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#define IXGBE_FLAG_RX_1BUF_CAPABLE (u32)(1 << 1)
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#define IXGBE_FLAG_RX_PS_CAPABLE (u32)(1 << 2)
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#define IXGBE_FLAG_RX_PS_ENABLED (u32)(1 << 3)
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#define IXGBE_FLAG_IN_NETPOLL (u32)(1 << 4)
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#define IXGBE_FLAG_IMIR_ENABLED (u32)(1 << 5)
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#define IXGBE_FLAG_MQ_CAPABLE (u32)(1 << 6)
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#define IXGBE_FLAG_NEED_LINK_UPDATE (u32)(1 << 7)
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#define IXGBE_FLAG_IN_WATCHDOG_TASK (u32)(1 << 8)
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/* OS defined structs */
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struct net_device *netdev;
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struct pci_dev *pdev;
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struct net_device_stats net_stats;
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/* structs defined in ixgbe_vf.h */
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struct ixgbe_hw hw;
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u16 msg_enable;
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struct ixgbevf_hw_stats stats;
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u64 zero_base;
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/* Interrupt Throttle Rate */
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u32 eitr_param;
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unsigned long state;
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u32 *config_space;
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u64 tx_busy;
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unsigned int tx_ring_count;
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unsigned int rx_ring_count;
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u32 link_speed;
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bool link_up;
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unsigned long link_check_timeout;
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struct work_struct watchdog_task;
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bool netdev_registered;
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bool dev_closed;
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};
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enum ixbgevf_state_t {
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__IXGBEVF_TESTING,
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__IXGBEVF_RESETTING,
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__IXGBEVF_DOWN
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};
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enum ixgbevf_boards {
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board_82599_vf,
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};
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extern struct ixgbevf_info ixgbevf_vf_info;
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extern struct ixgbe_mac_operations ixgbevf_mbx_ops;
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/* needed by ethtool.c */
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extern char ixgbevf_driver_name[];
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extern const char ixgbevf_driver_version[];
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extern int ixgbevf_up(struct ixgbevf_adapter *adapter);
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extern void ixgbevf_down(struct ixgbevf_adapter *adapter);
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extern void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
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extern void ixgbevf_reset(struct ixgbevf_adapter *adapter);
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extern void ixgbevf_set_ethtool_ops(struct net_device *netdev);
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extern int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *,
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struct ixgbevf_ring *);
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extern int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *,
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struct ixgbevf_ring *);
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extern void ixgbevf_free_rx_resources(struct ixgbevf_adapter *,
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struct ixgbevf_ring *);
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extern void ixgbevf_free_tx_resources(struct ixgbevf_adapter *,
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struct ixgbevf_ring *);
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extern void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
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#ifdef ETHTOOL_OPS_COMPAT
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extern int ethtool_ioctl(struct ifreq *ifr);
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#endif
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extern void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
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extern void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
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#ifdef DEBUG
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extern char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
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#define hw_dbg(hw, format, arg...) \
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printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
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#else
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#define hw_dbg(hw, format, arg...) do {} while (0)
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#endif
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#endif /* _IXGBEVF_H_ */
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