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bddbd13453
Just small two changes where the first fixes documentation and the second improves code readability. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEABECAAYFAlITEOUACgkQykllyylKDCF/NACeL44IBsj0MLhdhJmPCZKbt6Iq wIMAn1jLwzIUnKug6TuT3GzsNnrrNaCi =1u+P -----END PGP SIGNATURE----- Merge tag 'zynq-clk-for-3.12' of git://git.xilinx.com/linux-xlnx into clk-next arm: Xilinx Zynq clock changes for v3.12 Just small two changes where the first fixes documentation and the second improves code readability. |
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mmp | ||
mvebu | ||
mxs | ||
rockchip | ||
samsung | ||
socfpga | ||
spear | ||
sunxi | ||
tegra | ||
ux500 | ||
versatile | ||
x86 | ||
zynq | ||
clk-axi-clkgen.c | ||
clk-bcm2835.c | ||
clk-composite.c | ||
clk-devres.c | ||
clk-divider.c | ||
clk-fixed-factor.c | ||
clk-fixed-rate.c | ||
clk-gate.c | ||
clk-highbank.c | ||
clk-ls1x.c | ||
clk-max77686.c | ||
clk-mux.c | ||
clk-nomadik.c | ||
clk-nspire.c | ||
clk-ppc-corenet.c | ||
clk-prima2.c | ||
clk-s2mps11.c | ||
clk-si5351.c | ||
clk-si5351.h | ||
clk-twl6040.c | ||
clk-u300.c | ||
clk-vt8500.c | ||
clk-wm831x.c | ||
clk.c | ||
clkdev.c | ||
Kconfig | ||
Makefile |