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According to Designware I2C spec, if I2C_DYNAMIC_TAR_UPDATE is set to 1, the 10-bit addressing mode is controlled by IC_10BITADDR_MASTER bit of IC_TAR register instead of IC_CON register. The IC_10BITADDR_MASTER in IC_CON register becomes read-only copy. Since I2C_DYNAMIC_TAR_UPDATE value can't be detected from hardware register, so we will always set the IC_10BITADDR_MASTER bit in both IC_CON and IC_TAR register whenever 10-bit addresing mode is requested by user application. Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> |
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.. | ||
algos | ||
busses | ||
muxes | ||
i2c-boardinfo.c | ||
i2c-core.c | ||
i2c-core.h | ||
i2c-dev.c | ||
i2c-mux.c | ||
i2c-smbus.c | ||
i2c-stub.c | ||
Kconfig | ||
Makefile |