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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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4166b47c2b
The equivalent of both of these are now done via macro magic when the relevant register calls are made. The actual structure elements will shortly go away. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
860 lines
20 KiB
C
860 lines
20 KiB
C
/**
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* opt3001.c - Texas Instruments OPT3001 Light Sensor
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*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
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*
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* Author: Andreas Dannenberg <dannenberg@ti.com>
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* Based on previous work from: Felipe Balbi <balbi@ti.com>
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*
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* This program is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 of the License
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/bitops.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/iio/events.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#define OPT3001_RESULT 0x00
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#define OPT3001_CONFIGURATION 0x01
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#define OPT3001_LOW_LIMIT 0x02
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#define OPT3001_HIGH_LIMIT 0x03
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#define OPT3001_MANUFACTURER_ID 0x7e
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#define OPT3001_DEVICE_ID 0x7f
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#define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
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#define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
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#define OPT3001_CONFIGURATION_CT BIT(11)
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#define OPT3001_CONFIGURATION_M_MASK (3 << 9)
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#define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
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#define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
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#define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
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#define OPT3001_CONFIGURATION_OVF BIT(8)
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#define OPT3001_CONFIGURATION_CRF BIT(7)
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#define OPT3001_CONFIGURATION_FH BIT(6)
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#define OPT3001_CONFIGURATION_FL BIT(5)
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#define OPT3001_CONFIGURATION_L BIT(4)
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#define OPT3001_CONFIGURATION_POL BIT(3)
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#define OPT3001_CONFIGURATION_ME BIT(2)
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#define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
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/* The end-of-conversion enable is located in the low-limit register */
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#define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
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#define OPT3001_REG_EXPONENT(n) ((n) >> 12)
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#define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
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#define OPT3001_INT_TIME_LONG 800000
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#define OPT3001_INT_TIME_SHORT 100000
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/*
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* Time to wait for conversion result to be ready. The device datasheet
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* sect. 6.5 states results are ready after total integration time plus 3ms.
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* This results in worst-case max values of 113ms or 883ms, respectively.
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* Add some slack to be on the safe side.
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*/
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#define OPT3001_RESULT_READY_SHORT 150
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#define OPT3001_RESULT_READY_LONG 1000
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struct opt3001 {
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struct i2c_client *client;
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struct device *dev;
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struct mutex lock;
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bool ok_to_ignore_lock;
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bool result_ready;
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wait_queue_head_t result_ready_queue;
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u16 result;
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u32 int_time;
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u32 mode;
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u16 high_thresh_mantissa;
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u16 low_thresh_mantissa;
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u8 high_thresh_exp;
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u8 low_thresh_exp;
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bool use_irq;
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};
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struct opt3001_scale {
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int val;
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int val2;
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};
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static const struct opt3001_scale opt3001_scales[] = {
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{
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.val = 40,
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.val2 = 950000,
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},
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{
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.val = 81,
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.val2 = 900000,
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},
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{
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.val = 163,
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.val2 = 800000,
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},
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{
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.val = 327,
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.val2 = 600000,
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},
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{
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.val = 655,
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.val2 = 200000,
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},
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{
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.val = 1310,
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.val2 = 400000,
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},
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{
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.val = 2620,
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.val2 = 800000,
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},
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{
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.val = 5241,
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.val2 = 600000,
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},
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{
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.val = 10483,
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.val2 = 200000,
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},
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{
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.val = 20966,
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.val2 = 400000,
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},
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{
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.val = 83865,
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.val2 = 600000,
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},
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};
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static int opt3001_find_scale(const struct opt3001 *opt, int val,
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int val2, u8 *exponent)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
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const struct opt3001_scale *scale = &opt3001_scales[i];
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/*
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* Combine the integer and micro parts for comparison
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* purposes. Use milli lux precision to avoid 32-bit integer
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* overflows.
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*/
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if ((val * 1000 + val2 / 1000) <=
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(scale->val * 1000 + scale->val2 / 1000)) {
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*exponent = i;
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return 0;
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}
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}
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return -EINVAL;
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}
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static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
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u16 mantissa, int *val, int *val2)
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{
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int lux;
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lux = 10 * (mantissa << exponent);
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*val = lux / 1000;
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*val2 = (lux - (*val * 1000)) * 1000;
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}
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static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
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{
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*reg &= ~OPT3001_CONFIGURATION_M_MASK;
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*reg |= mode;
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opt->mode = mode;
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}
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static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
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static struct attribute *opt3001_attributes[] = {
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&iio_const_attr_integration_time_available.dev_attr.attr,
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NULL
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};
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static const struct attribute_group opt3001_attribute_group = {
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.attrs = opt3001_attributes,
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};
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static const struct iio_event_spec opt3001_event_spec[] = {
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_RISING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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{
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.type = IIO_EV_TYPE_THRESH,
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.dir = IIO_EV_DIR_FALLING,
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.mask_separate = BIT(IIO_EV_INFO_VALUE) |
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BIT(IIO_EV_INFO_ENABLE),
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},
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};
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static const struct iio_chan_spec opt3001_channels[] = {
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{
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.type = IIO_LIGHT,
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.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
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BIT(IIO_CHAN_INFO_INT_TIME),
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.event_spec = opt3001_event_spec,
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.num_event_specs = ARRAY_SIZE(opt3001_event_spec),
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},
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IIO_CHAN_SOFT_TIMESTAMP(1),
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};
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static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
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{
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int ret;
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u16 mantissa;
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u16 reg;
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u8 exponent;
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u16 value;
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long timeout;
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if (opt->use_irq) {
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/*
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* Enable the end-of-conversion interrupt mechanism. Note that
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* doing so will overwrite the low-level limit value however we
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* will restore this value later on.
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*/
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ret = i2c_smbus_write_word_swapped(opt->client,
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OPT3001_LOW_LIMIT,
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OPT3001_LOW_LIMIT_EOC_ENABLE);
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if (ret < 0) {
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dev_err(opt->dev, "failed to write register %02x\n",
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OPT3001_LOW_LIMIT);
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return ret;
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}
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/* Allow IRQ to access the device despite lock being set */
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opt->ok_to_ignore_lock = true;
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}
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/* Reset data-ready indicator flag */
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opt->result_ready = false;
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/* Configure for single-conversion mode and start a new conversion */
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ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
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if (ret < 0) {
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dev_err(opt->dev, "failed to read register %02x\n",
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OPT3001_CONFIGURATION);
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goto err;
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}
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reg = ret;
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opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE);
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ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
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reg);
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if (ret < 0) {
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dev_err(opt->dev, "failed to write register %02x\n",
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OPT3001_CONFIGURATION);
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goto err;
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}
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if (opt->use_irq) {
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/* Wait for the IRQ to indicate the conversion is complete */
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ret = wait_event_timeout(opt->result_ready_queue,
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opt->result_ready,
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msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
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} else {
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/* Sleep for result ready time */
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timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
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OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
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msleep(timeout);
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/* Check result ready flag */
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ret = i2c_smbus_read_word_swapped(opt->client,
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OPT3001_CONFIGURATION);
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if (ret < 0) {
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dev_err(opt->dev, "failed to read register %02x\n",
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OPT3001_CONFIGURATION);
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goto err;
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}
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if (!(ret & OPT3001_CONFIGURATION_CRF)) {
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ret = -ETIMEDOUT;
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goto err;
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}
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/* Obtain value */
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ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
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if (ret < 0) {
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dev_err(opt->dev, "failed to read register %02x\n",
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OPT3001_RESULT);
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goto err;
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}
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opt->result = ret;
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opt->result_ready = true;
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}
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err:
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if (opt->use_irq)
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/* Disallow IRQ to access the device while lock is active */
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opt->ok_to_ignore_lock = false;
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if (ret == 0)
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return -ETIMEDOUT;
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else if (ret < 0)
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return ret;
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if (opt->use_irq) {
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/*
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* Disable the end-of-conversion interrupt mechanism by
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* restoring the low-level limit value (clearing
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* OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
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* those enable bits would affect the actual limit value due to
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* bit-overlap and therefore can't be done.
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*/
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value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
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ret = i2c_smbus_write_word_swapped(opt->client,
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OPT3001_LOW_LIMIT,
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value);
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if (ret < 0) {
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dev_err(opt->dev, "failed to write register %02x\n",
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OPT3001_LOW_LIMIT);
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return ret;
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}
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}
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exponent = OPT3001_REG_EXPONENT(opt->result);
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mantissa = OPT3001_REG_MANTISSA(opt->result);
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opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
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return IIO_VAL_INT_PLUS_MICRO;
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}
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static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
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{
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*val = 0;
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*val2 = opt->int_time;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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static int opt3001_set_int_time(struct opt3001 *opt, int time)
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{
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int ret;
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u16 reg;
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ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
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if (ret < 0) {
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dev_err(opt->dev, "failed to read register %02x\n",
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OPT3001_CONFIGURATION);
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return ret;
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}
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reg = ret;
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switch (time) {
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case OPT3001_INT_TIME_SHORT:
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reg &= ~OPT3001_CONFIGURATION_CT;
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opt->int_time = OPT3001_INT_TIME_SHORT;
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break;
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case OPT3001_INT_TIME_LONG:
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reg |= OPT3001_CONFIGURATION_CT;
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opt->int_time = OPT3001_INT_TIME_LONG;
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break;
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default:
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return -EINVAL;
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}
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return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
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reg);
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}
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static int opt3001_read_raw(struct iio_dev *iio,
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struct iio_chan_spec const *chan, int *val, int *val2,
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long mask)
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{
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struct opt3001 *opt = iio_priv(iio);
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int ret;
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if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
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return -EBUSY;
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if (chan->type != IIO_LIGHT)
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return -EINVAL;
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mutex_lock(&opt->lock);
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switch (mask) {
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case IIO_CHAN_INFO_PROCESSED:
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ret = opt3001_get_lux(opt, val, val2);
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break;
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case IIO_CHAN_INFO_INT_TIME:
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ret = opt3001_get_int_time(opt, val, val2);
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break;
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default:
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ret = -EINVAL;
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}
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mutex_unlock(&opt->lock);
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return ret;
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}
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static int opt3001_write_raw(struct iio_dev *iio,
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struct iio_chan_spec const *chan, int val, int val2,
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long mask)
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{
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struct opt3001 *opt = iio_priv(iio);
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int ret;
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if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
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return -EBUSY;
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if (chan->type != IIO_LIGHT)
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return -EINVAL;
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if (mask != IIO_CHAN_INFO_INT_TIME)
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return -EINVAL;
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if (val != 0)
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return -EINVAL;
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mutex_lock(&opt->lock);
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ret = opt3001_set_int_time(opt, val2);
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mutex_unlock(&opt->lock);
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return ret;
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}
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static int opt3001_read_event_value(struct iio_dev *iio,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info,
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int *val, int *val2)
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{
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struct opt3001 *opt = iio_priv(iio);
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int ret = IIO_VAL_INT_PLUS_MICRO;
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mutex_lock(&opt->lock);
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switch (dir) {
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case IIO_EV_DIR_RISING:
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opt3001_to_iio_ret(opt, opt->high_thresh_exp,
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opt->high_thresh_mantissa, val, val2);
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break;
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case IIO_EV_DIR_FALLING:
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opt3001_to_iio_ret(opt, opt->low_thresh_exp,
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opt->low_thresh_mantissa, val, val2);
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break;
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default:
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ret = -EINVAL;
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}
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mutex_unlock(&opt->lock);
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return ret;
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}
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static int opt3001_write_event_value(struct iio_dev *iio,
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const struct iio_chan_spec *chan, enum iio_event_type type,
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enum iio_event_direction dir, enum iio_event_info info,
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int val, int val2)
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{
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struct opt3001 *opt = iio_priv(iio);
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int ret;
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u16 mantissa;
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u16 value;
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u16 reg;
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u8 exponent;
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if (val < 0)
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return -EINVAL;
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mutex_lock(&opt->lock);
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ret = opt3001_find_scale(opt, val, val2, &exponent);
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if (ret < 0) {
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dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
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goto err;
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}
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mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
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value = (exponent << 12) | mantissa;
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switch (dir) {
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case IIO_EV_DIR_RISING:
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reg = OPT3001_HIGH_LIMIT;
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opt->high_thresh_mantissa = mantissa;
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opt->high_thresh_exp = exponent;
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break;
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case IIO_EV_DIR_FALLING:
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reg = OPT3001_LOW_LIMIT;
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opt->low_thresh_mantissa = mantissa;
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opt->low_thresh_exp = exponent;
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break;
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default:
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ret = -EINVAL;
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goto err;
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}
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ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
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if (ret < 0) {
|
|
dev_err(opt->dev, "failed to write register %02x\n", reg);
|
|
goto err;
|
|
}
|
|
|
|
err:
|
|
mutex_unlock(&opt->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int opt3001_read_event_config(struct iio_dev *iio,
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
enum iio_event_direction dir)
|
|
{
|
|
struct opt3001 *opt = iio_priv(iio);
|
|
|
|
return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
|
|
}
|
|
|
|
static int opt3001_write_event_config(struct iio_dev *iio,
|
|
const struct iio_chan_spec *chan, enum iio_event_type type,
|
|
enum iio_event_direction dir, int state)
|
|
{
|
|
struct opt3001 *opt = iio_priv(iio);
|
|
int ret;
|
|
u16 mode;
|
|
u16 reg;
|
|
|
|
if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
|
|
return 0;
|
|
|
|
if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
|
|
return 0;
|
|
|
|
mutex_lock(&opt->lock);
|
|
|
|
mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
|
|
: OPT3001_CONFIGURATION_M_SHUTDOWN;
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
goto err;
|
|
}
|
|
|
|
reg = ret;
|
|
opt3001_set_mode(opt, ®, mode);
|
|
|
|
ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
|
|
reg);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to write register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
goto err;
|
|
}
|
|
|
|
err:
|
|
mutex_unlock(&opt->lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct iio_info opt3001_info = {
|
|
.attrs = &opt3001_attribute_group,
|
|
.read_raw = opt3001_read_raw,
|
|
.write_raw = opt3001_write_raw,
|
|
.read_event_value = opt3001_read_event_value,
|
|
.write_event_value = opt3001_write_event_value,
|
|
.read_event_config = opt3001_read_event_config,
|
|
.write_event_config = opt3001_write_event_config,
|
|
};
|
|
|
|
static int opt3001_read_id(struct opt3001 *opt)
|
|
{
|
|
char manufacturer[2];
|
|
u16 device_id;
|
|
int ret;
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_MANUFACTURER_ID);
|
|
return ret;
|
|
}
|
|
|
|
manufacturer[0] = ret >> 8;
|
|
manufacturer[1] = ret & 0xff;
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_DEVICE_ID);
|
|
return ret;
|
|
}
|
|
|
|
device_id = ret;
|
|
|
|
dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
|
|
manufacturer[1], device_id);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int opt3001_configure(struct opt3001 *opt)
|
|
{
|
|
int ret;
|
|
u16 reg;
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
return ret;
|
|
}
|
|
|
|
reg = ret;
|
|
|
|
/* Enable automatic full-scale setting mode */
|
|
reg &= ~OPT3001_CONFIGURATION_RN_MASK;
|
|
reg |= OPT3001_CONFIGURATION_RN_AUTO;
|
|
|
|
/* Reflect status of the device's integration time setting */
|
|
if (reg & OPT3001_CONFIGURATION_CT)
|
|
opt->int_time = OPT3001_INT_TIME_LONG;
|
|
else
|
|
opt->int_time = OPT3001_INT_TIME_SHORT;
|
|
|
|
/* Ensure device is in shutdown initially */
|
|
opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN);
|
|
|
|
/* Configure for latched window-style comparison operation */
|
|
reg |= OPT3001_CONFIGURATION_L;
|
|
reg &= ~OPT3001_CONFIGURATION_POL;
|
|
reg &= ~OPT3001_CONFIGURATION_ME;
|
|
reg &= ~OPT3001_CONFIGURATION_FC_MASK;
|
|
|
|
ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
|
|
reg);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to write register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
return ret;
|
|
}
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_LOW_LIMIT);
|
|
return ret;
|
|
}
|
|
|
|
opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
|
|
opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_HIGH_LIMIT);
|
|
return ret;
|
|
}
|
|
|
|
opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
|
|
opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static irqreturn_t opt3001_irq(int irq, void *_iio)
|
|
{
|
|
struct iio_dev *iio = _iio;
|
|
struct opt3001 *opt = iio_priv(iio);
|
|
int ret;
|
|
|
|
if (!opt->ok_to_ignore_lock)
|
|
mutex_lock(&opt->lock);
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
goto out;
|
|
}
|
|
|
|
if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
|
|
OPT3001_CONFIGURATION_M_CONTINUOUS) {
|
|
if (ret & OPT3001_CONFIGURATION_FH)
|
|
iio_push_event(iio,
|
|
IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
|
|
IIO_EV_TYPE_THRESH,
|
|
IIO_EV_DIR_RISING),
|
|
iio_get_time_ns(iio));
|
|
if (ret & OPT3001_CONFIGURATION_FL)
|
|
iio_push_event(iio,
|
|
IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
|
|
IIO_EV_TYPE_THRESH,
|
|
IIO_EV_DIR_FALLING),
|
|
iio_get_time_ns(iio));
|
|
} else if (ret & OPT3001_CONFIGURATION_CRF) {
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_RESULT);
|
|
goto out;
|
|
}
|
|
opt->result = ret;
|
|
opt->result_ready = true;
|
|
wake_up(&opt->result_ready_queue);
|
|
}
|
|
|
|
out:
|
|
if (!opt->ok_to_ignore_lock)
|
|
mutex_unlock(&opt->lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int opt3001_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct device *dev = &client->dev;
|
|
|
|
struct iio_dev *iio;
|
|
struct opt3001 *opt;
|
|
int irq = client->irq;
|
|
int ret;
|
|
|
|
iio = devm_iio_device_alloc(dev, sizeof(*opt));
|
|
if (!iio)
|
|
return -ENOMEM;
|
|
|
|
opt = iio_priv(iio);
|
|
opt->client = client;
|
|
opt->dev = dev;
|
|
|
|
mutex_init(&opt->lock);
|
|
init_waitqueue_head(&opt->result_ready_queue);
|
|
i2c_set_clientdata(client, iio);
|
|
|
|
ret = opt3001_read_id(opt);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = opt3001_configure(opt);
|
|
if (ret)
|
|
return ret;
|
|
|
|
iio->name = client->name;
|
|
iio->channels = opt3001_channels;
|
|
iio->num_channels = ARRAY_SIZE(opt3001_channels);
|
|
iio->dev.parent = dev;
|
|
iio->modes = INDIO_DIRECT_MODE;
|
|
iio->info = &opt3001_info;
|
|
|
|
ret = devm_iio_device_register(dev, iio);
|
|
if (ret) {
|
|
dev_err(dev, "failed to register IIO device\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Make use of INT pin only if valid IRQ no. is given */
|
|
if (irq > 0) {
|
|
ret = request_threaded_irq(irq, NULL, opt3001_irq,
|
|
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
|
|
"opt3001", iio);
|
|
if (ret) {
|
|
dev_err(dev, "failed to request IRQ #%d\n", irq);
|
|
return ret;
|
|
}
|
|
opt->use_irq = true;
|
|
} else {
|
|
dev_dbg(opt->dev, "enabling interrupt-less operation\n");
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int opt3001_remove(struct i2c_client *client)
|
|
{
|
|
struct iio_dev *iio = i2c_get_clientdata(client);
|
|
struct opt3001 *opt = iio_priv(iio);
|
|
int ret;
|
|
u16 reg;
|
|
|
|
if (opt->use_irq)
|
|
free_irq(client->irq, iio);
|
|
|
|
ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to read register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
return ret;
|
|
}
|
|
|
|
reg = ret;
|
|
opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN);
|
|
|
|
ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
|
|
reg);
|
|
if (ret < 0) {
|
|
dev_err(opt->dev, "failed to write register %02x\n",
|
|
OPT3001_CONFIGURATION);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id opt3001_id[] = {
|
|
{ "opt3001", 0 },
|
|
{ } /* Terminating Entry */
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, opt3001_id);
|
|
|
|
static const struct of_device_id opt3001_of_match[] = {
|
|
{ .compatible = "ti,opt3001" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, opt3001_of_match);
|
|
|
|
static struct i2c_driver opt3001_driver = {
|
|
.probe = opt3001_probe,
|
|
.remove = opt3001_remove,
|
|
.id_table = opt3001_id,
|
|
|
|
.driver = {
|
|
.name = "opt3001",
|
|
.of_match_table = of_match_ptr(opt3001_of_match),
|
|
},
|
|
};
|
|
|
|
module_i2c_driver(opt3001_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
|
|
MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");
|